Abstract: The present disclosure provides a chemical mechanical polishing device including a retaining ring and a wafer carrier and a polishing method. The retaining ring is configured on a polishing pad and includes an inner sidewall defining an opening and an outer sidewall opposite to the inner sidewall. The wafer carrier is configured on the polishing pad and is capable of placing a wafer disposed thereon into the opening and facing the polishing pad. The retaining ring has a notch at the corner adjacent to the wafer and the polishing pad.

Abstract: A semiconductor process for solving contact piping defect is provided in the present invention, including forming gates on a substrate, forming SiN spacers on sidewalls of the gates and the substrate is exposed from the SiN spacers between adjacent gates, performing an epitaxy process to form Si-based sacrificial layers on the gates and the exposed doped areas, and performing a first etchback process using phosphoric acid to pull back the SiN spacers, and the first etchback process removes the Si-based sacrificial layers.

Abstract: The present disclosure provides a chemical mechanical polishing device including a retaining ring and a wafer carrier and a polishing method. The retaining ring is configured on a polishing pad and includes an inner sidewall defining an opening and an outer sidewall opposite to the inner sidewall. The wafer carrier is configured on the polishing pad and is capable of placing a wafer disposed thereon into the opening and facing the polishing pad. The retaining ring has a notch at the corner adjacent to the wafer and the polishing pad.

Abstract: A method of manufacturing a memory structure including the following steps is provided. A first pad layer is formed on a substrate. Isolation structures are formed in the first pad layer and the substrate. At least one shape modification treatment is performed on the isolation structures. Each shape modification treatment includes the following steps. A first etching process is performed on the first pad layer to reduce a height of the first pad layer and to form first openings exposing sidewalls of the isolation structures. After the first etching process is performed, a second etching process is performed on the isolation structures to modify shapes of the sidewalls of the isolation structures exposed by the first openings. The first pad layer is removed to form a second opening between two adjacent isolation structures.

Abstract: A method of manufacturing a memory structure including the following steps is provided. A first pad layer is formed on a substrate. Isolation structures are formed in the first pad layer and the substrate. At least one shape modification treatment is performed on the isolation structures. Each shape modification treatment includes the following steps. A first etching process is performed on the first pad layer to reduce a height of the first pad layer and to form first openings exposing sidewalls of the isolation structures. After the first etching process is performed, a second etching process is performed on the isolation structures to modify shapes of the sidewalls of the isolation structures exposed by the first openings. The first pad layer is removed to form a second opening between two adjacent isolation structures.

Abstract: A method of manufacturing a non-volatile memory is provided. A substrate including a first region and a second region is provided. A first patterning process is performed to the first region, so as to form a plurality of gate stack structures in the first region. Afterwards, a first sidewall oxide layer is formed to cover sidewalls and an upper surface of each gate stack structure, and a protection layer is then formed on the first sidewall oxide layer. Next, an ion implantation process is performed to the second region, and a second patterning process is performed to the second region so as to form a plurality of gate structures. Then, a second sidewall oxide layer covering sidewalls of each gate structure is formed.

Abstract: A manufacturing method of floating gate is disclosed. A substrate having a plurality of isolation structures is provided, and top surfaces of the isolation structures are higher than a top surface of the substrate. A first conductive layer is formed on the substrate. A sacrificial layer is formed on the first conductive layer. Parts of the sacrificial layer are removed while parts of the sacrificial layer on the first conductive layer between the isolation structures are remained. Parts of the first conductive layer are removed by using the remaining parts of the sacrificial layer as masks to form conductive structures between the adjacent isolation structures. The remaining parts of the sacrificial layer are removed. A second conductive layer is formed on the substrate and the second conductive layer electrically connects with the conductive structures. The second conductive layer and the conductive structures are patterned to form floating gates.

Abstract: A method of manufacturing a non-volatile memory is provided. A substrate including a first region and a second region is provided. A first patterning process is performed to the first region, so as to form a plurality of gate stack structures in the first region. Afterwards, a first sidewall oxide layer is formed to cover sidewalls and an upper surface of each gate stack structure, and a protection layer is then formed on the first sidewall oxide layer. Next, an ion implantation process is performed to the second region, and a second patterning process is performed to the second region so as to form a plurality of gate structures. Then, a second sidewall oxide layer covering sidewalls of each gate structure is formed.

Abstract: A method for fabricating a semiconductor device is provided. The method includes the following steps. A substrate including a memory cell region and a peripheral region is provided, and a plurality of isolation structures are formed in the substrate. Each of the isolation structures contains an exposed portion protruding beyond the surface of the substrate. A first dielectric layer is formed on the substrate. A protective layer is formed on a sidewall of the exposed portion of each of the isolation structures. The first dielectric layer on the peripheral region is removed. A second dielectric layer is formed on the substrate of the peripheral region.

Abstract: A method for preparing a flame retardant modified acrylonitrile-based copolymer, includes: prepolymerizing a first composition to obtain a first prepolymer solution including a first prepolymer; prepolymerizing a second composition to obtain a second prepolymer solution including a second prepolymer; and mixing the first and second prepolymer solutions and subjecting a mixture of the first and second prepolymers to polymerization to obtain a flame retardant modified acrylonitrile-based copolymer solution containing a flame retardant modified acrylonitrile-based copolymer.

Abstract: A method for preparing a flame retardant modified acrylonitrile-based copolymer, includes: prepolymerizing a first composition to obtain a first prepolymer solution including a first prepolymer; prepolymerizing a second composition to obtain a second prepolymer solution including a second prepolymer; and mixing the first and second prepolymer solutions and subjecting a mixture of the first and second prepolymers to polymerization to obtain a flame retardant modified acrylonitrile-based copolymer solution containing a flame retardant modified acrylonitrile-based copolymer.

Abstract: A method of manufacturing super-absorbent polymer (SAP) which is powdery, insoluble in water, and able to absorb water, blood and urine with slight soluble substances. The method includes at least the following steps: mixing a monomer solution having at least 50 mol % of neutralized acrylic acid with polymerization initiators to synthesize a sticky precursor, wherein the monomer can be selected from acrylic acid, methacrylic acid, 2-acrylamido-2-methyl-propane sulfonic acid, or the mixtures thereof; mixing high hydrophilic epoxy compounds and polymerization initiators with the precursor and producing a gel via UV cross-linking; drying the gel at temperature of 100 to 250° C. to obtain a polymer; grinding and screening the polymer into constant particle size; coating the polymer with surface cross-linking agents; heating the polymer at temperature of 80 to 230° C.; and adding powdery inert inorganic salts into the polymer.

Abstract: A method of manufacturing super-absorbent polymer (SAP) which is powdery, insoluble in water, and able to absorb water, blood and urine with slight soluble substances. The method includes at least the following steps: mixing a monomer solution having at least 50 mol % of neutralized acrylic acid with polymerization initiators to synthesize a sticky precursor, wherein the monomer can be selected from acrylic acid, methacrylic acid, 2-acrylamido-2-methyl-propane sulfonic acid, or the mixtures thereof; mixing high hydrophilic epoxy compounds and polymerization initiators with the precursor and producing a gel via UV cross-linking; drying the gel at temperature of 100 to 250° C. to obtain a polymer; grinding and screening the polymer into constant particle size; coating the polymer with surface cross-linking agents; heating the polymer at temperature of 80 to 230° C.; and adding powdery inert inorganic salts into the polymer.