Abstract: A pulse width modulation control circuit for controlling a power converter circuit includes: a main loop control circuit; and a light-load loop control circuit. The light-load loop control circuit includes a current synthesis circuit configured to generate a synthesized current signal according to an input voltage and a target value of an output voltage and an inductance value of an inductor in a power stage circuit of the power converter circuit. The light-load loop control circuit generates a pulse modulation signal in light-load mode according to the synthesized current signal, to control a duty ratio of the power stage circuit. In the light-load mode, the main loop control circuit enters a power-saving state to reduce the power consumption of the pulse width modulation control circuit. The power-saving state includes: reducing the power consumption of the current sense circuit or stopping the operation of the current sense circuit.

Abstract: A digital constant on-time controller adaptable to a direct-current (DC)-to-DC converter includes a current sensing circuit that senses stored energy of the DC-to-DC converter, thereby generating a sense voltage; a semi-amplitude detector that detects half of a peak-to-peak amplitude of the sense voltage, thereby generating a semi-amplitude voltage; a DC voltage detector that detects a DC voltage across an effective series resistor of an energy storage circuit that provides the stored energy of the DC-to-DC converter, thereby generating a DC voltage; an arithmetic device that adds the sense voltage and the semi-amplitude voltage, from which the DC voltage and a predetermined reference signal are subtracted; and a pulse-width modulation (PWM) generator that generates a switch control signal according to a result of the arithmetic device.

Abstract: A digital constant on-time controller adaptable to a direct-current (DC)-to-DC converter includes a current sensing circuit that senses stored energy of the DC-to-DC converter, thereby generating a sense voltage; an offset cancellation circuit coupled to receive the sense voltage, thereby generating an offset-removed sense voltage according to a valley voltage of the sense voltage; a comparator that compares the offset-removed sense voltage with a reference signal; and a pulse-width modulation (PWM) generator that generates a switch control signal according to a comparison result of the comparator.