Abstract: A method includes following steps. First transistors are formed over a substrate. An interconnect structure is formed over the plurality of first transistors. A dielectric layer is formed over the interconnect structure. 2D semiconductor seeds are formed over the dielectric layer. The 2D semiconductor seeds are annealed. An epitaxy process is performed to laterally grow a plurality of 2D semiconductor films respectively from the plurality of 2D semiconductor seeds. Second transistors are formed on the plurality of 2D semiconductor films.

Abstract: A method includes following steps. A dielectric layer is formed over a substrate. A transition metal-containing layer is deposited on the dielectric layer. The transition metal-containing layer is patterned into a plurality of transition metal-containing pieces. The transition metal-containing pieces are sulfurized or selenized to form a plurality of semiconductor seeds. Semiconductor films are grown from semiconductor seeds. Transistors are formed on the semiconductor films.

Abstract: A sensing device and a manufacturing method thereof are provided. The sensing device includes a substrate, a first electrode layer, a first sensing layer, a first dielectric layer, a second electrode layer, a second sensing layer, a second dielectric layer, and a capping layer. The first electrode layer is disposed on the substrate. The first sensing layer is disposed on the first electrode layer and has a plurality of holes. The first dielectric layer is disposed on the first sensing layer. The second electrode layer is disposed on the first dielectric layer. The second sensing layer is disposed on the second electrode layer. A material of the second sensing layer is different from a material of the first sensing layer. The second dielectric layer is disposed on the second sensing layer. The capping layer is disposed on the substrate.

Abstract: A method includes following steps. First transistors are formed over a substrate. An interconnect structure is formed over the plurality of first transistors. A dielectric layer is formed over the interconnect structure. 2D semiconductor seeds are formed over the dielectric layer. The 2D semiconductor seeds are annealed. An epitaxy process is performed to laterally grow a plurality of 2D semiconductor films respectively from the plurality of 2D semiconductor seeds. Second transistors are formed on the plurality of 2D semiconductor films.

Abstract: An IC structure comprises a first transistor formed on a substrate, a first interconnect structure over the first transistor, a dielectric layer over the first interconnect structure, a plurality of 2D semiconductor islands on the dielectric layer, and a plurality of second transistors formed on the plurality of 2D semiconductor islands.

Abstract: A device comprises a plurality of 2D semiconductor nanostructures, a gate structure, a source region, and a drain region. The plurality of 2D semiconductor nanostructures extend in a first direction above a substrate and arranged in a second direction substantially perpendicular to the first direction. The gate structure surrounds each of the plurality of 2D semiconductor nanostructures. The source region and the drain region are respectively on opposite sides of the gate structure.

Abstract: An IC structure comprises a first transistor formed on a substrate, a first interconnect structure over the first transistor, a dielectric layer over the first interconnect structure, a plurality of 2D semiconductor islands on the dielectric layer, and a plurality of second transistors formed on the plurality of 2D semiconductor islands.