Patents by Inventor Kai-Yuan Siao

Kai-Yuan Siao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220351692
    Abstract: A method for dimming is adapted for a display device. The method for dimming includes the steps of: obtaining a plurality of first area peak luminance of a plurality of areas of a panel and a backlight plate of the display device; averaging the plurality of first area peak luminance to obtain an overall peak luminance value; looking the overall peak luminance value up in a lookup table to obtain a luminance adjustment value; and adjusting the plurality of first area peak luminance of the plurality of areas into a plurality of second area peak luminance. The plurality of first area peak luminance are a same with or are different from the plurality of second area peak luminance.
    Type: Application
    Filed: October 26, 2021
    Publication date: November 3, 2022
    Inventors: Shao-Ting CHEN, Yi-Fan LIN, Chi-Lung YEH, Kai-Yuan SIAO
  • Patent number: 11003034
    Abstract: The present invention relates to a display device comprising: a display panel having a plurality of pixels and a plurality of source lines, wherein each of the pixels is electrically connected to a respective source line; and an SD IC for providing pixel voltages and receiving a noise storage control signal and a noise output control signal; characterized in that the SD IC further comprises a noise reduce module to store voltage levels of the pixel voltages as compensating voltages based on the noise storage control signal and to output the compensating voltages based on the noise output control signal, wherein during a normal period, the SD IC outputs the pixel voltages to the pixels; during a compensation period, the SD IC outputs the compensating voltages to the pixels; wherein the noise output control signal is phased-delayed with respect to the noise storage control signal.
    Type: Grant
    Filed: September 13, 2018
    Date of Patent: May 11, 2021
    Assignee: AU OPTRONICS (KUNSHAN) CO., LTD.
    Inventors: Chung-Yu Huang, Jian-Feng Li, Kai-Yuan Siao
  • Publication number: 20200166815
    Abstract: The present invention relates to a display device comprising: a display panel having a plurality of pixels and a plurality of source lines, wherein each of the pixels is electrically connected to a respective source line; and an SD IC for providing pixel voltages and receiving a noise storage control signal and a noise output control signal; characterized in that the SD IC further comprises a noise reduce module to store voltage levels of the pixel voltages as compensating voltages based on the noise storage control signal and to output the compensating voltages based on the noise output control signal, wherein during a normal period, the SD IC outputs the pixel voltages to the pixels; during a compensation period, the SD IC outputs the compensating voltages to the pixels; wherein the noise output control signal is phased-delayed with respect to the noise storage control signal.
    Type: Application
    Filed: September 13, 2018
    Publication date: May 28, 2020
    Inventors: Chung-Yu HUANG, Jian-Feng LI, Kai-Yuan SIAO
  • Patent number: 10192515
    Abstract: A data driver for a display device comprises a first boost circuit, a first gate clock generation circuit, a first level shift circuit, and a data drive circuit. The first boost circuit is used to receive a supply voltage value and generate at least one preset voltage value. The first gate clock generation circuit is electrically coupled to the first boost circuit, and is used to receive a plurality of timing signals and at least one preset voltage value, and generate at least one first timing signal. The first level shift circuit is used to receive the at least one first timing signal and generate at least one gate timing signal. The data drive circuit is used to receive the timing signals, and generate a plurality of display data signals.
    Type: Grant
    Filed: December 20, 2016
    Date of Patent: January 29, 2019
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Shih-Yuan Su, Kai-Yuan Siao, Jian-Feng Li, Chun-Kuei Wen
  • Publication number: 20180025696
    Abstract: A data driver for a display device comprises a first boost circuit, a first gate clock generation circuit, a first level shift circuit, and a data drive circuit. The first boost circuit is used to receive a supply voltage value and generate at least one preset voltage value. The first gate clock generation circuit is electrically coupled to the first boost circuit, and is used to receive a plurality of timing signals and at least one preset voltage value, and generate at least one first timing signal. The first level shift circuit is used to receive the at least one first timing signal and generate at least one gate timing signal. The data drive circuit is used to receive the timing signals, and generate a plurality of display data signals.
    Type: Application
    Filed: December 20, 2016
    Publication date: January 25, 2018
    Inventors: Shih-Yuan SU, Kai-Yuan Siao, Jian-Feng Li, Chun-Kuei Wen
  • Patent number: 9129571
    Abstract: A display apparatus and an operation method thereof are provided. The display apparatus includes a display panel. The display panel includes a plurality of data lines, a plurality of scan lines and a plurality of pixels. The pixels are arranged in a matrix manner, and each pixel is electrically connected to one of the data lines and one of the scan lines. The operation method includes steps of: dividing the scan lines into N scan line groups, wherein N is an integer from 2 to the number of the scan lines; and in N frame periods sequentially driving the N scan line groups of scan line respectively and thereby sequentially updating display data of the pixels electrically connected to the N scan line groups of the scan line respectively.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: September 8, 2015
    Assignee: AU OPTRONICS CORP.
    Inventors: Kuo-Hsiang Chien, Kai-Yuan Siao, Chun-Hsien Lin, Tien-Chin Huang
  • Publication number: 20150213772
    Abstract: A display panel and a driving method thereof are provided. The display panel includes scan lines, data lines, and a pixel array. The scan lines are configured to sequentially transmit scan signals. The data lines are configured to transmit data signals. The pixel array includes a first column pixel unit and a second column pixel unit each of which includes pixel units. Each pixel unit in the first column pixel unit and the second column pixel unit includes sub-pixels with different colors. When the scan signals are sequentially transmitted to the pixel units, the data lines transmit the corresponding data signals to the sub-pixels with the same color in odd-numbered rows of the first column pixel unit and the sub-pixels with the same color in even-numbered rows of the second column pixel unit, such that the sub-pixels have the same polarity based on the corresponding data signals.
    Type: Application
    Filed: June 25, 2014
    Publication date: July 30, 2015
    Inventors: Yu-Hung TUNG, Kai-Yuan SIAO
  • Patent number: 8982030
    Abstract: A gate output control method is adapted into a flat display having a plurality of gate drive integrated circuits. The method comprises: providing a gate control signal; providing a oblique control signal to oblique modulate the gate control signal for generating a gate control signal with oblique; modulating the gate control signal with oblique to obtain a modulated gate control signal; and outputting the modulated gate control signal to the gate drive integrated circuits. A falling edge of the modulated gate control signal comprises a oblique-varying period and a vertical-varying period. In the oblique-varying period, the modulated gate control signal firstly changes to a predetermined voltage in a first slope, and then changes in a second slope until the vertical-varying period. In the vertical-varying period, the modulated gate control signal changes vertically or nearly vertically.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: March 17, 2015
    Assignee: AU Optronics Corp.
    Inventors: Kai-Yuan Siao, Jian-Feng Li, Hsiao-Chung Cheng, Tsung-Hung Lee, Chao-Ching Hsu
  • Patent number: 8916782
    Abstract: An electro-static discharge (ESD) protection structure includes a first insulation layer (having a first surface, a second surface opposite to the first surface, and a through hole), a patterned conductive layer (located on the first surface), an electro-static releasing layer (located on the second surface), and a solder mask layer. At least one portion of the patterned conductive layer surrounds the through hole. The electro-static releasing layer is electrically insulated from the patterned conductive layer. At least one portion of the electro-static releasing layer is around the through hole. The solder mask layer covers the first insulation layer and a portion of the patterned conductive layer and exposes a portion of the patterned conductive layer surrounding the through hole. A multi-layered circuit board including a second insulation layer, a power supply layer, a third insulation layer and the ESD protection structure is also provided.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: December 23, 2014
    Assignee: Au Optronics Corporation
    Inventors: Hsin-Ting Wu, Kai-Yuan Siao
  • Publication number: 20140267212
    Abstract: A plurality of pixels of a display panel are driven with a first polarity inversion to display a first image, driven with the first polarity inversion to display a second image after the first image is displayed, driven with a second polarity inversion to display a third image, and driven with the second polarity inversion to display a fourth image after the third image is displayed. The polarity of a first pixel of the first image is opposite to the polarity of a first pixel of the second image. The polarity of a first pixel of the third image is opposite to the polarity of a first pixel of the fourth image. The first polarity inversion is different from the second polarity inversion.
    Type: Application
    Filed: October 13, 2013
    Publication date: September 18, 2014
    Applicant: AU Optronics Corp
    Inventors: Jian-Feng Li, Jen-Chieh Chen, Kai-Yuan Siao, Yi-Fan Lin
  • Patent number: 8767024
    Abstract: A display apparatus with a display panel is provided. The display panel is initially driven to have the data voltages on any two consecutive data lines thereon with different polarities. If a to-be-displayed image contains a predetermined pattern constituted by pixels in row and two adjacent pixels therein have a gray-level difference therebetween greater than a predetermined value, a timing control circuit of the display apparatus divides the associated data lines into a plurality of data line groups each constituted by four consecutive data lines and configure the data voltages on the two middle data lines in one data line group to have a first polarity and the data voltages on the rest two data lines in the same data line group to have a second polarity. An operation method of the display apparatus is also provided.
    Type: Grant
    Filed: July 24, 2012
    Date of Patent: July 1, 2014
    Assignee: Au Optronics Corp.
    Inventors: Yi-Hao Wang, Kai-Yuan Siao
  • Publication number: 20130314389
    Abstract: A display apparatus with a display panel is provided. The display panel is initially driven to have the data voltages on any two consecutive data lines thereon with different polarities. If a to-be-displayed image contains a predetermined pattern constituted by pixels in row and two adjacent pixels therein have a gray-level difference therebetween greater than a predetermined value, a timing control circuit of the display apparatus divides the associated data lines into a plurality of data line groups each constituted by four consecutive data lines and configure the data voltages on the two middle data lines in one data line group to have a first polarity and the data voltages on the rest two data lines in the same data line group to have a second polarity. An operation method of the display apparatus is also provided.
    Type: Application
    Filed: July 24, 2012
    Publication date: November 28, 2013
    Applicant: AU OPTRONICS CORP.
    Inventors: Yi-Hao WANG, Kai-Yuan SIAO
  • Publication number: 20130314310
    Abstract: A display apparatus and an operation method thereof are provided. The display apparatus includes a display panel. The display panel includes a plurality of data lines, a plurality of scan lines and a plurality of pixels. The pixels are arranged in a matrix manner, and each pixel is electrically connected to one of the data lines and one of the scan lines. The operation method includes steps of: dividing the scan lines into N scan line groups, wherein N is an integer from 2 to the number of the scan lines; and in N frame periods sequentially driving the N scan line groups of scan line respectively and thereby sequentially updating display data of the pixels electrically connected to the N scan line groups of the scan line respectively.
    Type: Application
    Filed: January 23, 2013
    Publication date: November 28, 2013
    Applicant: AU OPTRONICS CORP.
    Inventors: Kuo-Hsiang CHIEN, Kai-Yuan SIAO, Chun-Hsien LIN, Tien-Chin HUANG
  • Publication number: 20130140072
    Abstract: An electro-static discharge (ESD) protection structure includes a first insulation layer (having a first surface, a second surface opposite to the first surface, and a through hole), a patterned conductive layer (located on the first surface), an electro-static releasing layer (located on the second surface), and a solder mask layer. At least one portion of the patterned conductive layer surrounds the through hole. The electro-static releasing layer is electrically insulated from the patterned conductive layer. At least one portion of the electro-static releasing layer is around the through hole. The solder mask layer covers the first insulation layer and a portion of the patterned conductive layer and exposes a portion of the patterned conductive layer surrounding the through hole. A multi-layered circuit board including a second insulation layer, a power supply layer, a third insulation layer and the ESD protection structure is also provided.
    Type: Application
    Filed: June 19, 2012
    Publication date: June 6, 2013
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Hsin-Ting Wu, Kai-Yuan Siao
  • Patent number: 8284368
    Abstract: A flat display device includes an array substrate. The array substrate includes a plurality of gate lines, data lines and pixels. The pixels include a plurality of first pixel units and second pixel units, and each of the first pixel units and each of the second pixel units include more than three pixels. The first pixel units and the second pixel units disposed in between two adjacent data lines are arranged alternately, wherein the first pixel units are electrically connected with one of the two adjacent data lines, and the second pixel units are electrically connected with the other data line.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: October 9, 2012
    Assignee: AU Optronics Corp.
    Inventors: Yi-Suei Liao, Chien-Liang Chen, Kai-Yuan Siao
  • Publication number: 20110085098
    Abstract: A flat display device includes an array substrate. The array substrate includes a plurality of gate lines, data lines and pixels. The pixels include a plurality of first pixel units and second pixel units, and each of the first pixel units and each of the second pixel units include more than three pixels. The first pixel units and the second pixel units disposed in between two adjacent data lines are arranged alternately, wherein the first pixel units are electrically connected with one of the two adjacent data lines, and the second pixel units are electrically connected with the other data line.
    Type: Application
    Filed: January 27, 2010
    Publication date: April 14, 2011
    Inventors: Yi-Suei Liao, Chien-Liang Chen, Kai-Yuan Siao
  • Publication number: 20110084894
    Abstract: A gate output control method is adapted into a flat display having a plurality of gate drive integrated circuits. The method comprises: providing a gate control signal; providing a oblique control signal to oblique modulate the gate control signal for generating a gate control signal with oblique; modulating the gate control signal with oblique to obtain a modulated gate control signal; and outputting the modulated gate control signal to the gate drive integrated circuits. A falling edge of the modulated gate control signal comprises a oblique-varying period and a vertical-varying period. In the oblique-varying period, the modulated gate control signal firstly changes to a predetermined voltage in a first slope, and then changes in a second slope until the vertical-varying period. In the vertical-varying period, the modulated gate control signal changes vertically or nearly vertically.
    Type: Application
    Filed: July 15, 2010
    Publication date: April 14, 2011
    Applicant: AU OPTRONICS CORP.
    Inventors: Kai-Yuan SIAO, Jian-Feng Li, Hsiao-Chung Cheng, Tsung-Hung Lee, Chao-Ching Hsu