Patents by Inventor Kai Yuan

Kai Yuan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9974842
    Abstract: Antibodies binding to sites on the alpha-subunit of the (Na++K+)-ATPase increase cardiac contraction of both ventricular myocytes and mouse heart. In particular, antibodies binding to the RSATEEEPPNDD (SEQ ID NO: 1) or DVEDSYGQQTYEQR (SEQ ID NO: 2) peptides (or isoforms/derivatives thereof) of the alpha-subunit of the (Na++K+)-ATPase, have been found to be highly inotropic. Both the antibodies and the peptides are important for the treatment of human heart failure and other contractile disorders.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: May 22, 2018
    Inventor: Kai Yuan Xu
  • Patent number: 9965664
    Abstract: A mobile data collector with a keyboard, used to be combined with a mobile electronic device, includes a protective cover, a data reader, and a keyboard module. The protective cover has a bottom plate and a surrounding frame. The surrounding frame is disposed along the perimeter of the bottom plate to form a first accommodation space and a second accommodation space located at one side of the first accommodation space. The mobile electronic device is disposed at the first accommodation space. The data reader is located at a side of the bottom plate opposite to the mobile electronic device and is electrically connected to the mobile electronic device. The keyboard module is disposed in the second accommodation space and electrically connected to the data reader. Thus, the mobile data collector has an input interface for inputting or modifying related information, which enhances usage convenience.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: May 8, 2018
    Assignee: RIOTEC CO., LTD.
    Inventor: Kai-Yuan Tien
  • Patent number: 9956275
    Abstract: Methods of inhibiting platelet activation and aggregation using peptide vaccine or antibodies that have binding specificity for the ? subunit of the (Na++K+)-ATPase are provided, along with methods for inhibiting or preventing thrombosis in a subject using such peptide vaccine or antibodies.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: May 1, 2018
    Inventor: Kai Yuan Xu
  • Publication number: 20180098379
    Abstract: An intelligent street light includes a lamppost and a data transmission system provided at the bottom of the lamppost. The data transmission system includes a data transmission unit, a data exchange unit and a plurality of network devices, which are connected to each other. The data transmission system allows data transmission to be performed between itself and a remote server. This can improve utilization of public resources, reduce construction costs and shorten construction periods of base stations, and effectively enhance coverage of communication signals to improve the quality of communication.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 5, 2018
    Inventors: HUNG-HSIANG CHIANG, KAI-YUAN KUO
  • Publication number: 20180094782
    Abstract: An intelligent street light structure includes an antenna, a data transmission system and wires. This makes the intelligent street light structure have a remote data transmission function and also effectively protect the antenna and the data transmission system provided therein again external invasion.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 5, 2018
    Inventors: HUNG-HSIANG CHIANG, KAI-YUAN KUO
  • Publication number: 20180060628
    Abstract: A mobile data collector with a keyboard, used to be combined with a mobile electronic device, includes a protective cover, a data reader, and a keyboard module. The protective cover has a bottom plate and a surrounding frame. The surrounding frame is disposed along the perimeter of the bottom plate to form a first accommodation space and a second accommodation space located at one side of the first accommodation space. The mobile electronic device is disposed at the first accommodation space. The data reader is located at a side of the bottom plate opposite to the mobile electronic device and is electrically connected to the mobile electronic device. The keyboard module is disposed in the second accommodation space and electrically connected to the data reader. Thus, the mobile data collector has an input interface for inputting or modifying related information, which enhances usage convenience.
    Type: Application
    Filed: March 15, 2017
    Publication date: March 1, 2018
    Inventor: Kai-Yuan TIEN
  • Publication number: 20180041046
    Abstract: A multi-power supply device includes a plurality of power input units configured to each supply an input power and being DC power input units, AC power input units, or a combination thereof; power channel control units electrically connected to the power input units, respectively, and turned on as soon as the output end voltage of the power channel control units is lower than the input end voltage of the power channel control units, wherein the power channel control unit with the highest input voltage is turned on to output an ON voltage; and a power output unit electrically connected to the power channel control units and adapted to output the ON voltage.
    Type: Application
    Filed: August 4, 2016
    Publication date: February 8, 2018
    Inventors: KAI-YUAN FU, RUH-HUA WU, CHUNG-TSENG CHANG
  • Publication number: 20180025696
    Abstract: A data driver for a display device comprises a first boost circuit, a first gate clock generation circuit, a first level shift circuit, and a data drive circuit. The first boost circuit is used to receive a supply voltage value and generate at least one preset voltage value. The first gate clock generation circuit is electrically coupled to the first boost circuit, and is used to receive a plurality of timing signals and at least one preset voltage value, and generate at least one first timing signal. The first level shift circuit is used to receive the at least one first timing signal and generate at least one gate timing signal. The data drive circuit is used to receive the timing signals, and generate a plurality of display data signals.
    Type: Application
    Filed: December 20, 2016
    Publication date: January 25, 2018
    Inventors: Shih-Yuan SU, Kai-Yuan Siao, Jian-Feng Li, Chun-Kuei Wen
  • Publication number: 20170362312
    Abstract: Antibodies that are agonists of sodium pump (Na+/K+ ATPase; NKA) activity are provided. In particular, antibodies that specifically bind epitopes on the beta-1 (?1) subunit of NKA are disclosed. These antibodies have the ability to increase the activity of the catalytic alpha subunit of NKA upon ?1 subunit binding. Due to their activity, the antibodies also have the ability to trigger a positive inotropic effect in cardiac tissues (i.e., increase cardiac contraction). The present invention thus includes, but is not limited to, NKA ?1 subunit peptide epitopes, antibodies that specifically bind the epitopes, methods of increasing NKA activity and cardiac contraction through administration of the peptide vaccines or the antibodies, and methods of treating and/or preventing heart disease through administration of the peptides or the antibodies.
    Type: Application
    Filed: September 7, 2017
    Publication date: December 21, 2017
    Inventor: Kai Yuan Xu
  • Publication number: 20170344091
    Abstract: A method of estimating power consumption of a processor includes accessing an electronic system level (ESL) model of the processor, the ESL model including a plurality of functional blocks, identifying a plurality of processor events by tracing activity of the plurality of functional blocks for a plurality of machine code instructions, and calculating a first power consumption value based on the plurality of processor events. The method also includes identifying a plurality of cycles by analyzing a plurality of micro-code operation codes corresponding to the plurality of machine code instructions, calculating a second power consumption value based on the plurality of cycles, and calculating a total power consumption value from the first power consumption value summed with the second power consumption value.
    Type: Application
    Filed: May 27, 2016
    Publication date: November 30, 2017
    Inventors: Kai-Yuan TING, Sandeep Kumar GOEL, Tze-Chiang HUANG, Yun-Han LEE
  • Publication number: 20170344093
    Abstract: A power state transformer, a system and a method thereof are disclosed. The power state transformer is coupled with a processing unit model. The power state transformer is configured for counting performance activities executed in the processing unit model, and further for determining a power state of the processing unit model according to count values of the performance activities.
    Type: Application
    Filed: May 31, 2016
    Publication date: November 30, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kai-Yuan TING, Shereef SHEHATA, Tze-Chiang HUANG, Sandeep Kumar GOEL, Mei WONG, Yun-Han LEE
  • Patent number: 9804984
    Abstract: A detection device for detecting types of a universal serial bus cable includes a detection circuit and a control unit. The detection circuit includes a signal source, a receiving end, a first resistor, a second resistor, a variable resistor, a first capacitor, a second capacitor, first through fourth switches, a VBUS end, an ID end, and a ground end. The signal source provides a detection signal. The control unit is electrically connected to the detection circuit, and is configured to control the first through the fourth switches according to a plurality of on-off states, to receive the detection signal and a VBUS signal from the receiving end in the plurality of on-off states, to generate a plurality of detection results, and to determine the type of the USB cable according to the plurality of detection results.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: October 31, 2017
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventor: Kai-Yuan Yin
  • Patent number: 9790270
    Abstract: Antibodies that are agonists of sodium pump (Na+/K+ ATPase; NKA) activity are provided. In particular, antibodies that specifically bind epitopes on the beta-1 (?1) subunit of NKA are disclosed. These antibodies have the ability to increase the activity of the catalytic alpha subunit of NKA upon ?1 subunit binding. Due to their activity, the antibodies also have the ability to trigger a positive inotropic effect in cardiac tissues (i.e., increase cardiac contraction). The present invention thus includes, but is not limited to, NKA ?1 subunit peptide epitopes, antibodies that specifically bind the epitopes, methods of agonizing NKA activity through administration of the peptides or the antibodies, and methods of treating and/or preventing heart disease through administration of the peptides or the antibodies.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: October 17, 2017
    Inventor: Kai Yuan Xu
  • Patent number: 9793143
    Abstract: Embodiments of a semiconductor processing apparatus are provided. The semiconductor processing apparatus includes a housing and a support base disposed in the housing. The semiconductor processing apparatus also includes a carrying arm movably disposed on the support base and a nozzle device disposed on the carrying arm. The semiconductor processing apparatus further includes a wafer plate disposed on the support base. When a cleaning process is performed, the carrying arm is moved toward the wafer plate, and the nozzle device emits a first gas toward the support base and the wafer plate.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: October 17, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ching-Hai Yang, Yao-Hwan Kao, Shang-Sheng Li, Yung-Chang Lu, Jian-Yuan Lai, Kai-Yuan Cheng
  • Publication number: 20170233257
    Abstract: A poly-crystalline silicon ingot having a bottom and defining a vertical direction includes a plurality of silicon grains grown in the vertical direction, in which the plurality of the silicon grains have at least three crystal orientations; and a nucleation promotion layer comprising a plurality of chips and chunks of poly-crystalline silicon on the bottom, wherein the poly-crystalline silicon ingot has a defect density at a height ranging from about 150 mm to about 250 mm of the poly-crystalline silicon ingot that is less than 15%.
    Type: Application
    Filed: May 1, 2017
    Publication date: August 17, 2017
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Wen-Huai Yu, Cheng-Jui Yang, Yu-Min Yang, Kai-Yuan Pai, Wen-Chieh Lan, Chan-Lu Su, Yu-Tsung Chiang, Sung-Lin Hsu, Wen-Ching Hsu, Chung-Wen Lan
  • Patent number: 9646128
    Abstract: A system comprises a processor-implemented tool configured to generate a layout of an integrated circuit (IC) die. At least one non-transitory machine readable storage medium includes a first portion encoded with a first gate-level description of first and second circuit patterns to be formed on first and second integrated circuit (IC) dies, respectively, and a second portion encoded with a second gate level description of the first and second circuit patterns received from the processor implemented tool. The second gate level description includes power and ground ports, and the first gate level description does not include power and ground ports. A processor-implemented first verification module is provided for comparing the first and second gate level descriptions and outputting a verified second gate-level description of the first and second circuit patterns.
    Type: Grant
    Filed: May 6, 2015
    Date of Patent: May 9, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ashok Mehta, Stanley John, Kai-Yuan Ting, Sandeep Kumar Goel, Chao-Yang Yeh
  • Patent number: 9637391
    Abstract: A crystalline silicon ingot and a method of fabricating the same are provided. The method utilizes a nucleation promotion layer to facilitate a plurality of silicon grains to nucleate on the nucleation promotion layer from a silicon melt and grow in a vertical direction into silicon grains until the silicon melt is completely solidified. The increment rate of defect density in the silicon ingot along the vertical direction has a range of 0.01%/mm˜10%/mm.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: May 2, 2017
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Wen-Huai Yu, Cheng-Jui Yang, Yu-Min Yang, Kai-Yuan Pai, Wen-Chieh Lan, Chan-Lu Su, Yu-Tsung Chiang, Sung-Lin Hsu, Wen-Ching Hsu, Chung-Wen Lan
  • Publication number: 20170106062
    Abstract: Methods of inhibiting platelet activation and aggregation using peptide vaccine or antibodies that have binding specificity for the ? subunit of the (Na++K+)-ATPase are provided, along with methods for inhibiting or preventing thrombosis in a subject using such peptide vaccine or antibodies.
    Type: Application
    Filed: December 27, 2016
    Publication date: April 20, 2017
    Inventor: Kai Yuan Xu
  • Patent number: 9625971
    Abstract: Provided is a system that includes a monitoring unit, processing units, and peripheral units. Each of the processing units is linked to the monitoring unit and each of the peripheral units is also linked to the monitoring unit. Each of the processing units is configured to transmit requests to and subsequently receive responses from at least one of the peripheral units through the monitoring unit. The monitoring unit is configured to measure and store delays between the responses and the respective requests.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: April 18, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Yuan Ting, Sandeep Kumar Goel, Ashok Mehta
  • Patent number: 9612277
    Abstract: A system and method is disclosed for functional verification of multi-die 3D ICs. The system and method include a reusable verification environment for testing each die in a stack of dies individually without having to simultaneously operate all of the dies in the stack. The system and method includes converting an input/output (“IO”) trace from a die verification test from a first format to a second format to improve performance.
    Type: Grant
    Filed: January 13, 2015
    Date of Patent: April 4, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Stanley John, Ashok Mehta, Sandeep Kumar Goel, Kai-Yuan Ting