Patents by Inventor Kaihan Abidi Ashtiani
Kaihan Abidi Ashtiani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11348795Abstract: Disclosed are methods of depositing a transition metal such as tungsten on a semiconductor substrate. The method includes providing a gas mixture of diborane with a balance of hydrogen, where the hydrogen serves to stabilize the diborane in the gas mixture. The method further includes delivering the gas mixture to the semiconductor substrate to form a boron layer, where the boron layer serves as a reducing agent layer to convert a metal-containing precursor to metal, such as a tungsten-containing precursor to tungsten. In some implementations, the semiconductor substrate includes a vertical structure, such as a three-dimensional vertical NAND structure, with horizontal features or wordlines having openings in sidewalls of the vertical structure, where the boron layer may be conformally deposited in the horizontal features of the vertical structure.Type: GrantFiled: August 10, 2018Date of Patent: May 31, 2022Assignee: Lam Research CorporationInventors: Lawrence Schloss, Raashina Humayun, Sanjay Gopinath, Juwen Gao, Michal Danek, Kaihan Abidi Ashtiani
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Patent number: 11049716Abstract: Provided herein are methods of filling gaps using high density plasma chemical vapor deposition (HDP CVD). According to various implementations, carbon-containing films such as amorphous carbon and amorphous carbide films are deposited by HDP CVD into gaps on substrates to fill the gaps. The methods may involve using high hydrogen-content process gasses during HDP CVD deposition to provide bottom-up fill. Also provided are related apparatus.Type: GrantFiled: November 16, 2018Date of Patent: June 29, 2021Assignee: Lam Research CorporationInventors: Wei Tang, Jason Daejin Park, Bart J. van Schravendijk, Shu Tsai Wang, Kaihan Abidi Ashtiani
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Publication number: 20200211853Abstract: Disclosed are methods of depositing a transition metal such as tungsten on a semiconductor substrate. The method includes providing a gas mixture of diborane with a balance of hydrogen, where the hydrogen serves to stabilize the diborane in the gas mixture. The method further includes delivering the gas mixture to the semiconductor substrate to form a boron layer, where the boron layer serves as a reducing agent layer to convert a metal-containing precursor to metal, such as a tungsten-containing precursor to tungsten. In some implementations, the semiconductor substrate includes a vertical structure, such as a three-dimensional vertical NAND structure, with horizontal features or wordlines having openings in sidewalls of the vertical structure, where the boron layer may be conformally deposited in the horizontal features of the vertical structure.Type: ApplicationFiled: August 10, 2018Publication date: July 2, 2020Inventors: Lawrence Schloss, Raashina Humayun, Sanjay Gopinath, Juwen Gao, Michal Danek, Kaihan Abidi Ashtiani
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Patent number: 10438847Abstract: Provided herein are methods of forming conductive cobalt (Co) interconnects and Co features. The methods involve deposition of a thin manganese (Mn)-containing film on a dielectric followed by subsequent deposition of cobalt on the Mn-containing film. The Mn-containing film may be deposited on a silicon-containing dielectric, such as silicon dioxide, and annealed to form a manganese silicate.Type: GrantFiled: May 10, 2017Date of Patent: October 8, 2019Assignee: Lam Research CorporationInventors: Chiukin Steven Lai, Jeong-Seok Na, Raashina Humayun, Michal Danek, Kaihan Abidi Ashtiani
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Publication number: 20190181004Abstract: Provided herein are methods of filling gaps using high density plasma chemical vapor deposition (HDP CVD). According to various implementations, carbon-containing films such as amorphous carbon and amorphous carbide films are deposited by HDP CVD into gaps on substrates to fill the gaps. The methods may involve using high hydrogen-content process gasses during HDP CVD deposition to provide bottom-up fill. Also provided are related apparatus.Type: ApplicationFiled: November 16, 2018Publication date: June 13, 2019Inventors: Wei Tang, Jason Daejin Park, Bart J. van Schravendijk, Shu Tsai Wang, Kaihan Abidi Ashtiani
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Patent number: 10049921Abstract: Implementations of the methods and apparatus disclosed herein relate to pore sealing of porous dielectric films using flowable dielectric material. The methods involve exposing a substrate having an exposed porous dielectric film thereon to a vapor phase dielectric precursor under conditions such that a flowable dielectric material selectively deposits in the pores of the porous dielectric material. The pores can be filled with the deposited flowable dielectric material without depositing a continuous film on any exposed metal surface.Type: GrantFiled: August 20, 2014Date of Patent: August 14, 2018Assignee: Lam Research CorporationInventors: Nerissa Sue Draeger, Kaihan Abidi Ashtiani, Deenesh Padhi, Derek B. Wong, Bart J. van Schravendijk, George Andrew Antonelli, Artur Kolics, Lie Zhao, Patrick A. van Cleemput
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Publication number: 20170330797Abstract: Provided herein are methods of forming conductive cobalt (Co) interconnects and Co features. The methods involve deposition of a thin manganese (Mn)-containing film on a dielectric followed by subsequent deposition of cobalt on the Mn-containing film. The Mn-containing film may be deposited on a silicon-containing dielectric, such as silicon dioxide, and annealed to form a manganese silicate.Type: ApplicationFiled: May 10, 2017Publication date: November 16, 2017Inventors: Chiukin Steven Lai, Jeong-Seok Na, Raashina Humayun, Michal Danek, Kaihan Abidi Ashtiani
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Publication number: 20160314964Abstract: Provided herein are methods of filling gaps using high density plasma chemical vapor deposition (HDP CVD). According to various implementations, carbon-containing films such as amorphous carbon and amorphous carbide films are deposited by HDP CVD into gaps on substrates to fill the gaps. The methods may involve using high hydrogen-content process gasses during HDP CVD deposition to provide bottom-up fill. Also provided are related apparatus.Type: ApplicationFiled: April 21, 2015Publication date: October 27, 2016Inventors: Wei Tang, Jason Daejin Park, Bart J. van Schravendijk, Shu Tsai Wang, Kaihan Abidi Ashtiani
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Patent number: 9447499Abstract: A dual-plenum showerhead for semiconductor processing operations is provided. The showerhead may include a faceplate with two sets of gas distribution holes, each set fed by a separate plenum. One set of gas distribution holes may be through-holes in the faceplate of the showerhead and may allow gases trapped between the faceplate and a plasma dome to flow towards a wafer. The other set of gas distribution holes may distribute gas routed through passages or channels in the faceplate towards the wafer. The passages or channels in the faceplate may include radial channels and annular channels and may be fed from an annular gas distribution channel about the periphery of the faceplate.Type: GrantFiled: June 22, 2012Date of Patent: September 20, 2016Assignee: Novellus Systems, Inc.Inventors: Shambhu N. Roy, Vincent E. Burkhart, Natan Solomon, Sanjay Gopinath, Kaihan Abidi Ashtiani, Bart van Schravendijk, Jason Stevens, Dhritiman Subha Kashyap, David Cohen
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Patent number: 9284644Abstract: A semiconductor processing gas flow manifold is provided that allows for the gas flow characteristics of the manifold gas flow paths to be individually adjusted outside of a semiconductor processing chamber. The gas flow manifold may be connected to a process gas dispersion device inside the semiconductor processing chamber. The process gas dispersion device may have multiple gas flow channels, each channel separately connected to a manifold gas flow path and targeted at a region on the semiconductor wafer. The adjustment of the individual manifold gas flow paths may vary the amount of process gas dispersed through each process gas dispersion gas flow channel onto the corresponding region of the semiconductor wafer.Type: GrantFiled: February 27, 2014Date of Patent: March 15, 2016Assignee: Lam Research CorporationInventors: Kevin Madrigal, Frances Katherine Zelaya, Hsiang-Yun Lee, Kaihan Abidi Ashtiani
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Publication number: 20160056071Abstract: Implementations of the methods and apparatus disclosed herein relate to pore sealing of porous dielectric films using flowable dielectric material. The methods involve exposing a substrate having an exposed porous dielectric film thereon to a vapor phase dielectric precursor under conditions such that a flowable dielectric material selectively deposits in the pores of the porous dielectric material. The pores can be filled with the deposited flowable dielectric material without depositing a continuous film on any exposed metal surface.Type: ApplicationFiled: August 20, 2014Publication date: February 25, 2016Inventors: Nerissa Sue Draeger, Kaihan Abidi Ashtiani, Deenesh Padhi, Derek B. Wong, Bart J. van Schravendijk, George Andrew Antonelli, Artur Kolics, Lie Zhao, Patrick A. van Cleemput
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Publication number: 20150240361Abstract: A semiconductor processing gas flow manifold is provided that allows for the gas flow characteristics of the manifold gas flow paths to be individually adjusted outside of a semiconductor processing chamber. The gas flow manifold may be connected to a process gas dispersion device inside the semiconductor processing chamber. The process gas dispersion device may have multiple gas flow channels, each channel separately connected to a manifold gas flow path and targeted at a region on the semiconductor wafer. The adjustment of the individual manifold gas flow paths may vary the amount of process gas dispersed through each process gas dispersion gas flow channel onto the corresponding region of the semiconductor wafer.Type: ApplicationFiled: February 27, 2014Publication date: August 27, 2015Inventors: Kevin Madrigal, Frances Katherine Zelaya, Hsiang-Yun Lee, Kaihan Abidi Ashtiani
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Publication number: 20130341433Abstract: A dual-plenum showerhead for semiconductor processing operations is provided. The showerhead may include a faceplate with two sets of gas distribution holes, each set fed by a separate plenum. One set of gas distribution holes may be through-holes in a faceplate of the showerhead and may allow gases trapped between the faceplate and a plasma dome to flow towards a wafer. The other set of gas distribution holes may distribute gas routed through passages or channels in the faceplate towards the wafer. The passages or channels in the faceplate may include radial channels and annular channels and may be fed from an annular gas distribution channel about the periphery of the faceplate.Type: ApplicationFiled: June 22, 2012Publication date: December 26, 2013Inventors: Shambhu N. Roy, Vincent E. Burkhart, Natan Solomon, Sanjay Gopinath, Kaihan Abidi Ashtiani, Bart van Schravendijk, Jason Stevens, Dhritiman Subha Kashyap, David Cohen
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Patent number: 6193854Abstract: A hollow cathode magnetron (HCM) sputter source includes a main magnet positioned near the sidewall of the hollow cathode target and a pair of rotating magnet arrays that are positioned near the closed end of the hollow cathode target. One of the arrays produces a magnetic field that is aligned with (aids) the magnetic field produced by the main magnet; the other arrays produce a magnetic field that is aligned against (bucks) the magnetic field produced by the main magnet. Field lines produced by the magnet arrays contain an extension of the plasma that is controlled by the main magnet. Charged particles circulate between the two portions of the plasma. The extended plasma is thus formed over a very high percentage of the surface of the target, thereby creating an erosion profile that is highly uniform and encompasses essentially the entire face of the target. This maximizes the utilization of the target and minimizes the frequency at which the spent target must be replaced.Type: GrantFiled: August 16, 1999Date of Patent: February 27, 2001Assignee: Novellus Systems, Inc.Inventors: Kwok Fai Lai, Larry Dowd Hartsough, Andrew L. Nordquist, Kaihan Abidi Ashtiani, Karl B. Levy, Maximilian A. Biberger
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Patent number: 6083363Abstract: An apparatus and method for processing the surface of a substrate with a plasma formed from a process gas comprises a processing chamber defining a plasma source region and a processing region wherein electrical energy is coupled into the source region to form and sustain a plasma therein, and an ion extraction mechanism positioned between the source region and processing region for extracting ions from the plasma and directing extracted ions and neutral particles into the processing region to process a biased substrate therein. A gas-dispersing element in the processing space disperses a process gas to intersect paths of the extracted ions and to produce charge exchange collisions to create a large number of high-energy neutral particles for processing the workpiece.Type: GrantFiled: July 2, 1997Date of Patent: July 4, 2000Assignee: Tokyo Electron LimitedInventors: Kaihan Abidi Ashtiani, James Anthony Seirmarco
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Patent number: 5669975Abstract: An apparatus for processing at least a surface of an article with a uniform plasma includes a processing chamber in which the article is disposed and a plasma source. The plasma source includes a dielectric plate having a first surface forming part of an inner wall of the processing chamber, and an electrical energy source, including a radiofrequency source and a substantially planar induction coil, the latter of which is disposed on a second surface of the dielectric plate, and to which energy from the radiofrequency source is preferably supplied through impedance matching circuitry. The substantially planar induction coil has at least two spiral portions which are symmetrical about at least one point of the substantially planar induction coil, and preferably forming a continuous "S-shape".Type: GrantFiled: March 27, 1996Date of Patent: September 23, 1997Assignees: Sony Corporation, Materials Research Corp.Inventor: Kaihan Abidi Ashtiani