Patents by Inventor Kailai WANG

Kailai WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190177106
    Abstract: A rotary-disk type card storage and retrieval device and a card storage and retrieval apparatus are disclosed. The aforementioned device comprises: a support; a rotary disk; a rotary disk driving mechanism; and a card-holding belt, wherein an axis of the rotary disk is horizontally arranged, a plurality of card storage slots are provided on the rotary disk, one end of each of the plurality of card storage slots is an access opening located on an outer cylindrical surface of the rotary disk, the other end of each of the plurality of card storage slots extends into the interior of the rotary disk, the card-holding belt has a card-holding section and rotates synchronously with the rotary disk, the card-holding section has a blocking portion extending to the access openings of the card storage slots, and the cards in the lower portion of the rotary disk are supported by the blocking portion.
    Type: Application
    Filed: November 8, 2018
    Publication date: June 13, 2019
    Inventor: Kailai Wang
  • Patent number: 9475646
    Abstract: A laminated chip writing device having a tower, a plurality of chip writing units arranged on the tower, and a driving mechanism for driving the tower and the chip writing units linearly. The plurality of chip writing units are arranged on the tower along an inclination direction having an angle between 0° and 90° in a horizontal direction. The two adjacent chip writing units are staggered on one another in the horizontal direction to form a staggered space. An arrangement direction of the chip writing units on the tower is parallel to the linear movement direction of the chip writing units. When any chip writing unit arrives at a card access position, the clearance in the chip writing unit and the staggered space under the clearance form a passage in which working dial teeth pushes a card.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: October 25, 2016
    Assignee: Guangzhou Mingsen Technologies Co., Ltd.
    Inventor: Kailai Wang
  • Publication number: 20160264359
    Abstract: A laminated chip writing device having a tower, a plurality of chip writing units arranged on the tower, and a driving mechanism for driving the tower and the chip writing units linearly. The plurality of chip writing units are arranged on the tower along an inclination direction having an angle between 0° and 90° in a horizontal direction. The two adjacent chip writing units are staggered on one another in the horizontal direction to form a staggered space. An arrangement direction of the chip writing units on the tower is parallel to the linear movement direction of the chip writing units. When any chip writing unit arrives at a card access position, the clearance in the chip writing unit and the staggered space under the clearance form a passage in which working dial teeth pushes a card.
    Type: Application
    Filed: April 24, 2015
    Publication date: September 15, 2016
    Applicant: Guangzhou Mingsen Mech. & Elec. Equipment Co., Ltd.
    Inventor: Kailai Wang
  • Patent number: 8743613
    Abstract: A solid-state memory device has a memory interface that includes a timing signal port for receiving a timing signal, a data transfer port, a data transfer module for transferring blocks of data signals between the data transfer port and the memory module, and a selectable delay module for providing a selected delay between transitions in the data signals DQ and transitions in the timing signals DQS. The memory interface also has a delay controller for setting the selected delay, for detecting a variation in a delay produced by the selectable delay module relative to a reference delay, for controlling a pause in transfer of a block of the data signals DQ, and for adjusting the selected delay during the pause.
    Type: Grant
    Filed: September 10, 2012
    Date of Patent: June 3, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kailai Wang, Liang Zhao
  • Publication number: 20130258777
    Abstract: A solid-state memory device has a memory interface that includes a timing signal port for receiving a timing signal, a data transfer port, a data transfer module for transferring blocks of data signals between the data transfer port and the memory module, and a selectable delay module for providing a selected delay between transitions in the data signals DQ and transitions in the timing signals DQS. The memory interface also has a delay controller for setting the selected delay, for detecting a variation in a delay produced by the selectable delay module relative to a reference delay, for controlling a pause in transfer of a block of the data signals DQ, and for adjusting the selected delay during the pause.
    Type: Application
    Filed: September 10, 2012
    Publication date: October 3, 2013
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Kailai WANG, Liang Zhao