Patents by Inventor Kailash Dhiman

Kailash Dhiman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160187900
    Abstract: A voltage regulator circuit with two series connected resistors connected together at a common resistor node. An initial conducting path has a first pass transistor with a first terminal connected to a first supply rail and a second terminal connected to a regulated output voltage. A main conducting path has a second pass transistor with a first terminal connected to the first supply rail and a second terminal connected to the regulated output voltage. A comparator has an input connected to the common resistor node output is connected to a gate of the first pass transistor. A voltage threshold switch is connected to the common resistor node, and based on the voltage at the common resistor node the voltage threshold switch selectively connects a gate of the second pass transistor to the comparator output.
    Type: Application
    Filed: December 24, 2014
    Publication date: June 30, 2016
    Inventors: Kailash Dhiman, Nidhi Chaudhry, Divya Tripathi
  • Patent number: 9229465
    Abstract: A current-starved inverter circuit includes first and second current-mirror circuits, first and second transistors, a detector, and a current-booster. The first and second transistors receive a first source current and a first sink current from the first and second current-mirror circuits, respectively, and an input voltage signal, and generate an inverted input voltage signal (an output voltage signal). The detector generates a first detection signal when the output voltage signal exceeds a first threshold value and a second detection signal when the output voltage signal is less than a second threshold value. The current-booster, which is connected to the detector, receives the first and second detection signals and provides a second source current and a second sink current to the first and second transistors to pull-up and pull-down a voltage level of the output voltage signal, respectively.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: January 5, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Kailash Dhiman, Parul Sharma, Divya Tripathi
  • Publication number: 20150277462
    Abstract: A current-starved inverter circuit includes first and second current-mirror circuits, first and second transistors, a detector, and a current-booster. The first and second transistors receive a first source current and a first sink current from the first and second current-mirror circuits, respectively, and an input voltage signal, and generate an inverted input voltage signal (an output voltage signal). The detector generates a first detection signal when the output voltage signal exceeds a first threshold value and a second detection signal when the output voltage signal is less than a second threshold value. The current-booster, which is connected to the detector, receives the first and second detection signals and provides a second source current and a second sink current to the first and second transistors to pull-up and pull-down a voltage level of the output voltage signal, respectively.
    Type: Application
    Filed: March 26, 2014
    Publication date: October 1, 2015
    Inventors: Kailash Dhiman, Parul Sharma, Divya Tripathi