Abstract: The invention relates to a method of adjusting the critical dimensions of a poly-silicon or amorphous silicon gate in an MOS transistor structure. In an example embodiment, there is a method for controlling critical dimensions on a wafer substrate, the wafer substrate comprising a silicon layer, an oxide layer, a poly-silicon layer, and an organic bottom anti-reflective coating (BARC) layer. The method comprises defining features on the organic BARC layer with a masking layer, the features having masking critical dimensions. With a first etch, unmasked areas on the organic BARC layer are etched until the poly-silicon layer is exposed. The first etch defines after-etch critical dimensions of the features.

Abstract: A method for forming a trench for a shallow trench isolation structure wherein the trench has rounded bottom corners. In one embodiment, the present invention performs a breakthrough etch to remove a native oxide layer disposed over a region of a semiconductor substrate. In so doing, a region of the semiconductor substrate is exposed. Next, the present embodiment etches a trench into the semiconductor substrate using a first etching environment. In this embodiment, the first etching environment is comprised of chlorine, hydrogen bromide, helium, and oxygen. The present embodiment then rounds the bottom corners of the trench using a second etching environment. In this embodiment, the second etching environment is comprised sulfur hexafluoride (SF6) and chlorine. In so doing, the present embodiment provides a method for forming a trench for a shallow trench isolation structure wherein the trench does not have sharp bottom corners formed therein.

Abstract: A method for manufacturing a semiconductor device uses a silicon etch process that minimizes micro-masking defects in shallow trench isolation regions. In an example embodiment, a silicon etch comprising Cl2, HBr, HeO2, and N2 is introduced onto the substrate; the volumetric flow of Cl2 being in the range of about 60 sccm, the volumetric flow of HBr being in the range of about 150 sccm; and the volumetric flow of HeO2 being in the range of about 10 sccm and the volumetric flow of N2 being the range of about 20 sccm, with a pressure maintained at about 60 mT. The silicon etch forms a trench of a predetermined depth.