Abstract: A streaking-free CMOS image sensor with an on-gate dual-electrode pass transistor is provided, including a silicon substrate, clamping photodiodes arranged in a photosensitive region, a dual-electrode charge transfer gate, namely a pass transistor, a charge-to-voltage conversion node, and a reset transistor, wherein the photoelectric conversion region of the clamping photodiode is located on a left side of the pass transistor and directly connected to a channel below a gate of the pass transistor, and a right side of the pass transistor is tightly connected to the charge-to-voltage conversion node. The present invention changes the potential of a charge transfer channel through a sequential coordination of applying different voltages to a gate of the pass transistor by double electrodes, thus achieving fast charge transfer and readout while reducing streaking.

Abstract: The present invention relates to technical field of analog integrated circuit design. TDI function is better realized by CMOS image sensor and it improves scanning frequency of the CMOS-TDI image sensor and extends application range of TDI technique. To this end, the present invention proposes a technical solution of high scanning frequency CMOS-TDI image sensor. The pixels include a photodiode, an operational amplifier, integration capacitors C1 and C2 of the same capacitance, an offset voltage removing capacitor C3, and plural switches S1-S10. The anode of the photodiode is connected to a zero voltage ground wire, while the cathode thereof is connected to one end of the switch S9. The other end of the switch S9 is connected to a reference voltage Vref. The above pixels are cascaded and an output end of the last pixel is connected to a column-parallel ADC through a readout switch Read. The invention mainly applies to analog integration circuit design.

Abstract: The present invention relates to technical field of analog integrated circuit design. TDI function is better realized by CMOS image sensor and it improves scanning frequency of the CMOS-TDI image sensor and extends application range of TDI technique. To this end, the present invention proposes a technical solution of a current accumulative pixel structure for CMOS-TDI image sensor which comprises a photodiode, four MOS transistors M1, M2, M3, M4, four switches S1, S2, S3, S4, and two capacitors C1, C2; the connection relationship thereof is denoted below: the anode of the photodiode D1 is connected to a ground wire, while the cathode thereof is connected to an input end; the drain and gate of the transistor M1 are both connected with the input end, while the source thereof is connected with a power source VDD. The current invention mainly finds its application in analog integration circuit design.

Abstract: The present invention relates to technical field of analog integrated circuit design. TDI function is better realized by CMOS image sensor and it improves scanning frequency of the CMOS-TDI image sensor and extends application range of TDI technique. To this end, the present invention proposes a technical solution of a current accumulative pixel structure for CMOS-TDI image sensor which comprises a photodiode, four MOS transistors M1, M2, M3, M4, four switches S1, S2, S3, S4, and two capacitors C1, C2; the connection relationship thereof is denoted below: the anode of the photodiode D1 is connected to a ground wire, while the cathode thereof is connected to an input end; the drain and gate of the transistor M1 are both connected with the input end, while the source thereof is connected with a power source VDD. The current invention mainly finds its application in analog integration circuit design.

Abstract: The present invention relates to technical field of analog integrated circuit design. TDI function is better realized by CMOS image sensor and it improves scanning frequency of the CMOS-TDI image sensor and extends application range of TDI technique. To this end, the present invention proposes a technical solution of high scanning frequency CMOS-TDI image sensor. The pixels include a photodiode, an operational amplifier, integration capacitors C1 and C2 of the same capacitance, an offset voltage removing capacitor C3, and plural switches S1-S10. The anode of the photodiode is connected to a zero voltage ground wire, while the cathode thereof is connected to one end of the switch S9. The other end of the switch S9 is connected to a reference voltage Vref. The above pixels are cascaded and an output end of the last pixel is connected to a column-parallel ADC through a readout switch Read. The invention mainly applies to analog integration circuit design.

Abstract: The present invention relates to the field of design of analog digital hybrid integrated circuit. The object of the invention is to reduce ADC conversion rate thus further reducing power consumption of the sensor while not reducing line frequency of the CMOS-TDI. To this end, a digital domain accumulative CMOS-TDI image sensor with low power consumption is provided. It includes a pixel array of n+k lines multiplied m columns, a column parallel signal pre-processing circuit, a column parallel successive approximation (SAR) ADC, a column parallel digital domain accumulator, a column parallel divider, a timing control circuit and an output shift register, wherein n+k+1 coarse quantification memory units are provided to the column parallel digital domain accumulator for storage of coarse quantification results; and memory units for storage of n times of fine quantification results are also provided, thus realizing n stages of TDI signal accumulation after accumulation of n times of fine quantification results.

Abstract: The present invention relates to the field of design of analog digital hybrid integrated circuit. The object of the invention is to reduce ADC conversion rate thus further reducing power consumption of the sensor while not reducing line frequency of the CMOS-TDI. To this end, a digital domain accumulative CMOS-TDI image sensor with low power consumption is provided. It includes a pixel array of n+k lines multiplied m columns, a column parallel signal pre-processing circuit, a column parallel successive approximation (SAR) ADC, a column parallel digital domain accumulator, a column parallel divider, a timing control circuit and an output shift register, wherein n+k+1 coarse quantification memory units are provided to the column parallel digital domain accumulator for storage of coarse quantification results; and memory units for storage of n times of fine quantification results are also provided, thus realizing n stages of TDI signal accumulation after accumulation of n times of fine quantification results.