Abstract: A semiconductor device includes an insulated gate bipolar transistor region and a diode region adjacent to each other, wherein the insulated gate bipolar transistor region includes base layers of a second conductive type provided on the first main surface side, emitter layers of the first conductive type selectively provided in a surface layer of the base layer on the first main surface side, multiple gate electrodes provided on the first main surface side of the semiconductor substrate, aligned in a first direction extending along the first main surface, and facing the emitter layer, the base layer, and the drift layer via a gate insulating film, carrier injection suppression layers of the first conductive type selectively provided in a surface layer of the base layer on the first main surface side and sandwiched by the base layers in the first direction.

Abstract: A semiconductor device includes: a drift layer of a first conduction type provided in a semiconductor substrate having a first principal plane and a second principal plane opposed to the first principal plane; a first semiconductor layer of a second conduction type provided between the first principal plane of the semiconductor substrate and the drift layer and having impurity concentration higher than impurity concentration of the drift layer; a first buffer layer of a first conduction type provided between the second principal plane of the semiconductor substrate and the drift layer and having hydrogen-induced donors with impurity concentration higher than impurity concentration of the drift layer; and a second semiconductor layer of a first conduction type or a second conduction type provided between the second principal plane of the semiconductor substrate and the first buffer layer and having impurity concentration higher than impurity concentration of the drift layer, wherein the first buffer layer incl

Abstract: A semiconductor device includes: a drift layer of a first conduction type provided in a semiconductor substrate having a first principal plane and a second principal plane opposed to the first principal plane; a first semiconductor layer of a second conduction type provided between the first principal plane of the semiconductor substrate and the drift layer and having impurity concentration higher than impurity concentration of the drift layer; a first buffer layer of a first conduction type provided between the second principal plane of the semiconductor substrate and the drift layer and having hydrogen-induced donors with impurity concentration higher than impurity concentration of the drift layer; and a second semiconductor layer of a first conduction type or a second conduction type provided between the second principal plane of the semiconductor substrate and the first buffer layer and having impurity concentration higher than impurity concentration of the drift layer, wherein the first buffer layer incl

Abstract: A semiconductor device includes a semiconductor substrate having a drift layer of a first conductivity type and a collector layer of a second conductivity type. A first buffer layer having a higher impurity concentration peak than that of the drift layer is formed between the drift layer and the collector layer and a second buffer layer having a higher impurity concentration peak than that of the drift layer is formed between the first buffer layer and the collector layer. A kurtosis of a peak of an impurity concentration of the second buffer layer is lower than a kurtosis of a peak of an impurity concentration of the first buffer layer.

Abstract: A semiconductor device includes a semiconductor substrate, a transistor region, a diode region, a boundary trench gate, and a carrier control region. The boundary trench gate is provided in a boundary portion between the transistor region and the diode region. The carrier control region is provided as a surface layer of the semiconductor substrate at a position closer to the boundary trench gate than the source layer located between the boundary trench gate and the trench gate. A concentration of first conductivity type impurities contained in the carrier control region is higher than a concentration of the first conductivity type impurities contained in the source layer or a concentration of second conductivity type impurities contained in the carrier control region is lower than a concentration of the second conductivity type impurities contained in the source layer.

Abstract: A predetermined relational expression holds where a first distance along the in-plane direction from a channel of the first semiconductor layer to a third semiconductor layer that is the other of the collector layer and the cathode layer is designated as W, a second distance from the channel of the first semiconductor layer to the second semiconductor layer is designated as S, and a diffusion coefficient and a lifetime of a part of the semiconductor substrate between the channel of the first semiconductor layer and the third semiconductor layer are designated as D and ?, respectively.

Abstract: A semiconductor device includes: a drift layer of a first conduction type provided in a semiconductor substrate having a first principal plane and a second principal plane opposed to the first principal plane; a first semiconductor layer of a second conduction type provided between the first principal plane of the semiconductor substrate and the drift layer and having impurity concentration higher than impurity concentration of the drift layer; a first buffer layer of a first conduction type provided between the second principal plane of the semiconductor substrate and the drift layer and having hydrogen-induced donors with impurity concentration higher than impurity concentration of the drift layer; and a second semiconductor layer of a first conduction type or a second conduction type provided between the second principal plane of the semiconductor substrate and the first buffer layer and having impurity concentration higher than impurity concentration of the drift layer, wherein the first buffer layer incl

Abstract: In plan view of an RC-IGBT, a boundary region has an occupancy rate of an n+-type source layer per unit area, the occupancy rate being smaller than an occupancy rate of the n+-type source layer per unit area in an IGBT region, and the boundary region has an occupancy rate of a p+-type contact layer per unit area, the occupancy rate being smaller than an occupancy rate of the p+-type contact layer per unit area in an IGBT region.

Abstract: A semiconductor device includes: first diode trench gates extending along a first main surface from a first end side of a cell region toward a second end side thereof opposite to the first end side, the first diode trench gates being disposed adjacent to each other at a first spacing; a boundary trench gate connected to end portions of the first diode trench gates and extending in a direction intersecting a direction of extension of the first diode trench gates; and second diode trench gates having end portions connected to the boundary trench gate and extending toward the second end side of the cell region.

Abstract: A semiconductor device includes a semiconductor substrate, a transistor region, a diode region, a boundary trench gate, and a carrier control region. The boundary trench gate is provided in a boundary portion between the transistor region and the diode region. The carrier control region is provided as a surface layer of the semiconductor substrate at a position closer to the boundary trench gate than the source layer located between the boundary trench gate and the trench gate. A concentration of first conductivity type impurities contained in the carrier control region is higher than a concentration of the first conductivity type impurities contained in the source layer or a concentration of second conductivity type impurities contained in the carrier control region is lower than a concentration of the second conductivity type impurities contained in the source layer.

Abstract: A predetermined relational expression holds where a first distance along the in-plane direction from a channel of the first semiconductor layer to a third semiconductor layer that is the other of the collector layer and the cathode layer is designated as W, a second distance from the channel of the first semiconductor layer to the second semiconductor layer is designated as S, and a diffusion coefficient and a lifetime of a part of the semiconductor substrate between the channel of the first semiconductor layer and the third semiconductor layer are designated as D and ?, respectively.

Abstract: A semiconductor device includes a transistor and a diode formed at a common semiconductor substrate. The diode region includes: a fifth semiconductor layer of a second conductivity type; a second semiconductor layer of the second conductivity type provided on the fifth semiconductor layer; a third semiconductor layer of a first conductivity type provided closer to a first main surface of the semiconductor substrate; a sixth semiconductor layer of the first conductivity type provided on the third semiconductor layer; and a lifetime control layer formed of a crystal defect layer reaching a deeper position than an intermediate position of the second semiconductor layer between an end of the third semiconductor layer in a thickness direction as viewed from the first main surface and an end of the fifth semiconductor layer in a thickness direction as viewed from a second main surface.

Abstract: A semiconductor device includes an insulated gate bipolar transistor region and a diode region adjacent to each other, wherein the insulated gate bipolar transistor region includes base layers of a second conductive type provided on the first main surface side, emitter layers of the first conductive type selectively provided in a surface layer of the base layer on the first main surface side, multiple gate electrodes provided on the first main surface side of the semiconductor substrate, aligned in a first direction extending along the first main surface, and facing the emitter layer, the base layer, and the drift layer via a gate insulating film, carrier injection suppression layers of the first conductive type selectively provided in a surface layer of the base layer on the first main surface side and sandwiched by the base layers in the first direction.

Abstract: A semiconductor device includes: first diode trench gates extending along a first main surface from a first end side of a cell region toward a second end side thereof opposite to the first end side, the first diode trench gates being disposed adjacent to each other at a first spacing; a boundary trench gate connected to end portions of the first diode trench gates and extending in a direction intersecting a direction of extension of the first diode trench gates; and second diode trench gates having end portions connected to the boundary trench gate and extending toward the second end side of the cell region.