Patents by Inventor Kalevi KOKKO
Kalevi KOKKO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11923236Abstract: A method for forming a semiconductor structure comprising a silicon-on-insulator layer structure with crystalline silicon oxide SiOx as the insulator material comprises: providing a crystalline silicon substrate having a substantially clean deposition surface in a vacuum chamber; heating the silicon substrate to an oxidation temperature To in the range of 550 to 1200 ° C.; supplying, while keeping the silicon substrate in the oxidation temperature, with an oxidation pressure Po in the range of 1·10?8 to 1·10?4 mbar in the vacuum chamber, molecular oxygen O2 into the vacuum chamber with an oxygen dose Do in the range of 0.1 to 1000 Langmuir; whereby a crystalline silicon oxide layer with a thickness of at least two molecular layers is formed within the silicon substrate, between a crystalline silicon base layer and a crystalline silicon top layer. Related semiconductor structures are described.Type: GrantFiled: September 12, 2022Date of Patent: March 5, 2024Assignee: TURUN YLIOPISTOInventors: Pekka Laukkanen, Mikhail Kuzmin, Jaakko Mäkelä, Marjukka Tuominen, Marko Punkkinen, Antti Lahti, Kalevi Kokko, Juha-Pekka Lehtiö
-
Publication number: 20230223252Abstract: This disclosure relates to a method (100) for passivating a semiconductor structure, comprising a semiconductor layer and an oxide layer on the semiconductor layer; a semiconductor structure; and a vacuum processing system. The method (100) comprises providing the semiconductor structure (110) in a vacuum chamber (310) and, while keeping the semiconductor structure in the vacuum chamber (120) throughout a refinement period with a duration of at least 25 s refining the oxide layer (130) by maintaining temperature (131) of the semiconductor structure within a refinement temperature range extending from 20° C., to 800° C., and maintaining total pressure (132) in the vacuum chamber below a maximum total pressure, of 1×10?3 mbar.Type: ApplicationFiled: March 29, 2021Publication date: July 13, 2023Inventors: Pekka Laukkanen, Zahra Jahanshah Rad, Juha-Pekka Lehtiö, Mikhail Kuzmin, Marko Punkkinen, Kalevi Kokko
-
Patent number: 11646193Abstract: A method for forming a foreign oxide or foreign nitride layer (6) on a substrate (1) of a semiconductor comprises providing a semiconductor substrate (1) having an oxidized or nitridized surface layer (3), supplying a foreign element (5) on the oxidized or nitridized surface layer; and keeping the oxidized or nitridized surface layer (3) at an elevated temperature so as to oxidize or nitridize at least partially the foreign element by the oxygen or nitrogen, respectively, initially present in the oxidized or nitridized surface layer (3).Type: GrantFiled: December 9, 2019Date of Patent: May 9, 2023Assignee: TURUN YLIOPISTOInventors: Mikhail Kuzmin, Pekka Laukkanen, Yasir Muhammad, Marjukka Tuominen, Johnny Dahl, Veikko Tuominen, Jaakko Makela, Marko Punkkinen, Kalevi Kokko
-
Patent number: 11615952Abstract: A method for forming a foreign oxide or foreign nitride layer (6) on a substrate (1) of a semiconductor comprises providing a semiconductor substrate (1) having an oxidized or nitridized surface layer (3), supplying a foreign element (5) on the oxidized or nitridized surface layer; and keeping the oxidized or nitridized surface layer (3) at an elevated temperature so as to oxidize or nitridize at least partially the foreign element by the oxygen or nitrogen, respectively, initially present in the oxidized or nitridized surface layer (3).Type: GrantFiled: February 17, 2016Date of Patent: March 28, 2023Assignee: TURUN YLIOPISTOInventors: Mikhail Kuzmin, Pekka Laukkanen, Yasir Muhammad, Marjukka Tuominen, Johnny Dahl, Veikko Tuominen, Jaakko Makela, Marko Punkkinen, Kalevi Kokko
-
Publication number: 20230005786Abstract: A method for forming a semiconductor structure comprising a silicon-on-insulator layer structure with crystalline silicon oxide SiOx as the insulator material comprises: providing a crystalline silicon substrate having a substantially clean deposition surface in a vacuum chamber; heating the silicon substrate to an oxidation temperature To in the range of 550 to 1200 ° C.; supplying, while keeping the silicon substrate in the oxidation temperature, with an oxidation pressure Po in the range of 1·10?8 to 1·10?4 mbar in the vacuum chamber, molecular oxygen O2 into the vacuum chamber with an oxygen dose Do in the range of 0.1 to 1000 Langmuir; whereby a crystalline silicon oxide layer with a thickness of at least two molecular layers is formed within the silicon substrate, between a crystalline silicon base layer and a crystalline silicon top layer. Related semiconductor structures are described.Type: ApplicationFiled: September 12, 2022Publication date: January 5, 2023Applicant: Turun yliopistoInventors: Pekka LAUKKANEN, Mikhail Kuzmin, Jaakko Mäkelä, Marjukka Tuominen, Marko Punkkinen, Antti Lahti, Kalevi Kokko, Juha-Pekka Lehtio
-
Patent number: 11443977Abstract: A method (100) for forming a semiconductor structure (200) comprising a silicon-on-insulator layer structure with crystalline silicon oxide SiOx as the insulator material comprises: providing (120) a crystalline silicon substrate (201) having a substantially clean deposition surface (202) in a vacuum chamber; heating (130) the silicon substrate to an oxidation temperature To in the range of 550 to 1200, 550 to 1000, or 550 to 850° C.; supplying (140), while keeping the silicon substrate in the oxidation temperature, with an oxidation pressure Po in the range of 1·10?8 to 1·10?4 mbar in the vacuum chamber, molecular oxygen O2 into the vacuum chamber with an oxygen dose Do in the range of 0.1 to 1000 Langmuir; whereby a crystalline silicon oxide layer (204) with a thickness of at least two molecular layers is formed within the silicon substrate, between a crystalline silicon base layer (203) and a crystalline silicon top layer (205).Type: GrantFiled: May 30, 2018Date of Patent: September 13, 2022Assignee: TURUN YLIOPISTOInventors: Pekka Laukkanen, Mikhail Kuzmin, Jaakko Mäkelä, Marjukka Tuominen, Marko Punkkinen, Antti Lahti, Kalevi Kokko, Juha-Pekka Lehtiö
-
Publication number: 20220208546Abstract: This disclosure relates to a semiconductor structure (100), comprising a crystalline silicon substrate (110), having a surface (111), and a crystalline silicon oxide superstructure (120) on the surface (111) of the silicon substrate (110), the silicon oxide superstructure (120) having a thickness of at least two molecular layers and a (1×1) plane structure using Wood's notation.Type: ApplicationFiled: April 23, 2020Publication date: June 30, 2022Inventors: Pekka LAUKKANEN, Juha-Pekka LEHTIÖ, Zahra JAHANSHAH RAD, Mikhail KUZMIN, Marko PUNKKINEN, Antti LAHTI, Kalevi KOKKO
-
Publication number: 20200111662Abstract: A method for forming a foreign oxide or foreign nitride layer (6) on a substrate (1) of a semiconductor comprises providing a semiconductor substrate (1) having an oxidized or nitridized surface layer (3), supplying a foreign element (5) on the oxidized or nitridized surface layer; and keeping the oxidized or nitridized surface layer (3) at an elevated temperature so as to oxidize or nitridize at least partially the foreign element by the oxygen or nitrogen, respectively, initially present in the oxidized or nitridized surface layer (3).Type: ApplicationFiled: December 9, 2019Publication date: April 9, 2020Applicant: Turun YliopistoInventors: Mikhail KUZMIN, Pekka LAUKKANEN, Yasir MUHAMMAD, Marjukka TUOMINEN, Johnny DAHL, Veikko TUOMINEN, Jaakko MAKELA, Marko PUNKKINEN, Kalevi KOKKO
-
Publication number: 20200105576Abstract: A method (100) for forming a semiconductor structure (200) comprising a silicon-on-insulator layer structure with crystalline silicon oxide SiOx as the insulator material comprises: providing (120) a crystalline silicon substrate (201) having a substantially clean deposition surface (202) in a vacuum chamber; heating (130) the silicon substrate to an oxidation temperature To in the range of 550 to 1200, 550 to 1000, or 550 to 850° C.; supplying (140), while keeping the silicon substrate in the oxidation temperature, with an oxidation pressure Po in the range of 1·10?8 to 1·10?4 mbar in the vacuum chamber, molecular oxygen O2 into the vacuum chamber with an oxygen dose Do in the range of 0.1 to 1000 Langmuir; whereby a crystalline silicon oxide layer (204) with a thickness of at least two molecular layers is formed within the silicon substrate, between a crystalline silicon base layer (203) and a crystalline silicon top layer (205).Type: ApplicationFiled: May 30, 2018Publication date: April 2, 2020Applicant: Turun yliopistoInventors: Pekka LAUKKANEN, Mikhail KUZMIN, Jaakko MÄKELÄ, Marjukka TUOMINEN, Marko PUNKKINEN, Antti LAHTI, Kalevi KOKKO, Juha-Pekka LEHTIÖ
-
Publication number: 20180218901Abstract: A method for forming a foreign oxide or foreign nitride layer (6) on a substrate (1) of a semiconductor comprises providing a semiconductor substrate (1) having an oxidized or nitridized surface layer (3), supplying a foreign element (5) on the oxidized or nitridized surface layer; and keeping the oxidized or nitridized surface layer (3) at an elevated temperature so as to oxidize or nitridize at least partially the foreign element by the oxygen or nitrogen, respectively, initially present in the oxidized or nitridized surface layer (3).Type: ApplicationFiled: February 17, 2016Publication date: August 2, 2018Applicant: Turun YliopistoInventors: Mikhail KUZMIN, Pekka LAUKKANEN, Yasir MUHAMMAD, Marjukka TUOMINEN, Johnny DAHL, Veikko TUOMINEN, Jaakko MAKELA, Marko PUNKKINEN, Kalevi KOKKO