Patents by Inventor Kalu K. Vasoya
Kalu K. Vasoya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10531556Abstract: A method of assembling a component to a printed circuit board that includes a thermal layer and a circuit layer separated by a dielectric layer. The circuit layer includes circuit pads that correspond to terminal surfaces on the component. The dielectric layer includes an aperture that exposes a portion of the thermal layer that correspond to a thermal pad on the component. Solder paste is applied to the circuit pads and the exposed thermal layer. Lower surfaces of the solder paste are in contact with the circuit pads and the thermal layer and upper surfaces of the solder paste are substantially coplanar. The component is placed on the solder paste. The printed circuit board and the component are heated to create solder joints between the terminal surfaces on the component and the circuit pads and between the thermal pad on the component and the thermal layer.Type: GrantFiled: January 29, 2018Date of Patent: January 7, 2020Assignee: Adura LED Solutions, LLCInventor: Kalu K. Vasoya
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Patent number: 9883580Abstract: A method of assembling a component to a printed circuit board that includes a thermal layer and a circuit layer separated by a dielectric layer. The circuit layer includes circuit pads that correspond to terminal surfaces on the component. The dielectric layer includes an aperture that exposes a portion of the thermal layer that correspond to a thermal pad on the component. Solder paste is applied to the circuit pads and the exposed thermal layer. Lower surfaces of the solder paste are in contact with the circuit pads and the thermal layer and upper surfaces of the solder paste are substantially coplanar. The component is placed on the solder paste. The printed circuit board and the component are heated to create solder joints between the terminal surfaces on the component and the circuit pads and between the thermal pad on the component and the thermal layer.Type: GrantFiled: April 10, 2015Date of Patent: January 30, 2018Assignee: ADURA LED SOLUTIONS, LLCInventor: Kalu K. Vasoya
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Patent number: 9408314Abstract: Integrated circuits and processes for manufacturing integrated circuits are described that use printed wiring board substrates having a core layer that is part of the circuit of the printed wiring board. In a number of embodiments, the core layer is constructed from a carbon composite. In several embodiments, techniques are described for increasing the integrity of core layers in designs calling for high density clearance hole drilling. One embodiment of the invention includes a core layer that includes electrically conductive material and at least one build-up wiring portion formed on an outer surface of the core layer. In addition, the build-up portion comprises at least one micro wiring layer including a circuit that is electrically connected to the electrically conductive material in the core layer via a plated through hole.Type: GrantFiled: June 7, 2012Date of Patent: August 2, 2016Assignee: Stablcor Technology Inc.Inventor: Kalu K. Vasoya
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Publication number: 20120241202Abstract: Integrated circuits and processes for manufacturing integrated circuits are described that use printed wiring board substrates having a core layer that is part of the circuit of the printed wiring board. In a number of embodiments, the core layer is constructed from a carbon composite. In several embodiments, techniques are described for increasing the integrity of core layers in designs calling for high density clearance hole drilling. One embodiment of the invention includes a core layer that includes electrically conductive material and at least one build-up wiring portion formed on an outer surface of the core layer. In addition, the build-up portion comprises at least one micro wiring layer including a circuit that is electrically connected to the electrically conductive material in the core layer via a plated through hole.Type: ApplicationFiled: June 7, 2012Publication date: September 27, 2012Applicant: Stablcor Technology, Inc.Inventor: Kalu K. Vasoya
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Patent number: 8203080Abstract: Integrated circuits and processes for manufacturing integrated circuits are described that use printed wiring board substrates having a core layer that is part of the circuit of the printed wiring board. In a number of embodiments, the core layer is constructed from a carbon composite. In several embodiments, techniques are described for increasing the integrity of core layers in designs calling for high density clearance hole drilling. One embodiment of the invention includes a core layer that includes electrically conductive material and at least one build-up wiring portion formed on an outer surface of the core layer. In addition, the build-up portion comprises at least one micro wiring layer including a circuit that is electrically connected to the electrically conductive material in the core layer via a plated through hole.Type: GrantFiled: July 16, 2007Date of Patent: June 19, 2012Assignee: Stablcor Technology, Inc.Inventor: Kalu K. Vasoya
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Publication number: 20120097431Abstract: Prepregs, laminates, printed wiring board structures and processes for constructing materials and printed wiring boards that enable the construction of printed wiring boards with improved thermal properties. In one embodiment, the prepregs include substrates impregnated with electrically and thermally conductive resins. In other embodiments, the prepregs have substrate materials that include carbon. In other embodiments, the prepregs include substrates impregnated with thermally conductive resins. In other embodiments, the printed wiring board structures include electrically and thermally conductive laminates that can act as ground and/or power planes.Type: ApplicationFiled: December 28, 2011Publication date: April 26, 2012Applicant: Stablcor Technology, Inc.Inventors: Kalu K. Vasoya, Bharat M. Mangrolia, William E. Davis, Richard A. Bohner
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Patent number: 8097335Abstract: Prepregs, laminates, printed wiring board structures and processes for constructing materials and printed wiring boards that enable the construction of printed wiring boards with improved thermal properties. In one embodiment, the prepregs include substrates impregnated with electrically and thermally conductive resins. In other embodiments, the prepregs have substrate materials that include carbon. In other embodiments, the prepregs include substrates impregnated with thermally conductive resins. In other embodiments, the printed wiring board structures include electrically and thermally conductive laminates that can act as ground and/or power planes.Type: GrantFiled: February 18, 2010Date of Patent: January 17, 2012Assignee: Stablcor Technology, Inc.Inventors: Kalu K. Vasoya, Bharat M. Mangrolia, William E. Davis, Richard A. Bohner
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Publication number: 20110272179Abstract: A printed circuit board includes a dielectric layer having a first surface and an opposing second surface and a circuit layer laminated to the first surface of the dielectric layer. Cut-out windows provide openings through the dielectric and circuit layers. A thermally conductive layer is laminated to the second surface of the dielectric layer. The thermally conductive layer includes at least one sinkpad that passes through the cut-out windows. The sinkpad is an embossed, hollow feature of the thermally conductive layer. A surface of the sinkpad may be substantially coplanar with a surface of the circuit layer and be prepared for compatibility with a solder reflow process. A heat generating electronic component may be electrically coupled to the circuit layer and thermally coupled to the sinkpad of the thermally conductive layer to form an electronic assembly.Type: ApplicationFiled: April 27, 2011Publication date: November 10, 2011Inventor: Kalu K. Vasoya
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Publication number: 20100319969Abstract: Prepregs, laminates, printed wiring board structures and processes for constructing materials and printed wiring boards that enable the construction of printed wiring boards with improved thermal properties. In one embodiment, the prepregs include substrates impregnated with electrically and thermally conductive resins. In other embodiments, the prepregs have substrate materials that include carbon. In other embodiments, the prepregs include substrates impregnated with thermally conductive resins. In other embodiments, the printed wiring board structures include electrically and thermally conductive laminates that can act as ground and/or power planes.Type: ApplicationFiled: February 18, 2010Publication date: December 23, 2010Inventors: Kalu K. Vasoya, Bharat M. Mangrolia, William E. Davis, Richard A. Bohner
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Patent number: 7730613Abstract: Methods of manufacturing printed wiring boards including electrically conductive constraining cores that involve a single lamination cycle are disclosed. One example of the method of the invention includes drilling a clearance pattern in an electrically conductive constraining core, arranging the electrically conductive constraining core in a stack up that includes B-stage (semi-cured) layers of dielectric material on either side of the constraining core and additional layers of material arranged to form the at least one functional layer, performing a lamination cycle on the stack up that causes the resin in the B-stage (semi-cured) layers of dielectric to reflow and fill the clearance pattern in the electrically conductive constraining core before curing and drilling plated through holes.Type: GrantFiled: March 6, 2007Date of Patent: June 8, 2010Assignee: Stablcor, Inc.Inventor: Kalu K. Vasoya
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Patent number: 7667142Abstract: Prepregs, laminates, printed wiring board structures and processes for constructing materials and printed wiring boards that enable the construction of printed wiring boards with improved thermal properties. In one embodiment, the prepregs include substrates impregnated with electrically and thermally conductive resins. In other embodiments, the prepregs have substrate materials that include carbon. In other embodiments, the prepregs include substrates impregnated with thermally conductive resins. In other embodiments, the printed wiring board structures include electrically and thermally conductive laminates that can act as ground and/or power planes.Type: GrantFiled: August 18, 2004Date of Patent: February 23, 2010Assignee: Stablcor, Inc.Inventors: Kalu K. Vasoya, Bharat M. Mangrolia, William E. Davis, Richard A. Bohner
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Patent number: 7635815Abstract: Prepregs, laminates, printed wiring board structures and processes for constructing materials and printed wiring boards that enable the construction of printed wiring boards with improved thermal properties. In one embodiment, the prepregs include substrates impregnated with electrically and thermally conductive resins. In other embodiments, the prepregs have substrate materials that include carbon. In other embodiments, the prepregs include substrates impregnated with thermally conductive resins. In other embodiments, the printed wiring board structures include electrically and thermally conductive laminates that can act as ground and/or power planes.Type: GrantFiled: August 18, 2004Date of Patent: December 22, 2009Assignee: Stablcor, Inc.Inventors: Kalu K. Vasoya, Bharat M. Mangrolia, William E. Davis, Richard A. Bohner
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Publication number: 20090090465Abstract: Printed wiring boards and methods of manufacturing printed wiring boards are disclosed. In one aspect of the invention, the printed wiring boards include electrically conductive constraining cores having at least one resin filled channel. The resin filled channels perform a variety of functions that can be associated with electrical isolation and increased manufacturing yields.Type: ApplicationFiled: July 11, 2008Publication date: April 9, 2009Inventor: Kalu K. Vasoya
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Patent number: 7301105Abstract: Printed wiring boards are disclosed that include regions having different coefficients of thermal expansion. In one aspect of the invention, the regions can be matched to the coefficients of thermal expansion of devices mounted on the printed wiring board. In one embodiment, the invention includes a layer including a base material and at least one insert material that are combined using a resin. In addition, the base material and insert material are located within the same plane.Type: GrantFiled: August 29, 2005Date of Patent: November 27, 2007Assignee: Stablcor, Inc.Inventor: Kalu K. Vasoya
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Patent number: 7173325Abstract: Structures and techniques for mounting semiconductor dies are disclosed. In one embodiment, the invention includes a stack of printed wiring board assemblies that are connected via interconnection components. At least one of the printed wiring board assemblies includes an interposer substrate having a constraining layer that includes carbon.Type: GrantFiled: August 30, 2004Date of Patent: February 6, 2007Assignee: C-Core Technologies, Inc.Inventors: Kalu K. Vasoya, Bharat M. Mangrolia
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Patent number: 6869664Abstract: Prepregs, laminates, printed wiring board structures and processes for constructing materials and printed wiring boards that enable the construction of printed wiring boards with improved thermal properties. In one embodiment, the prepregs include substrates impregnated with electrically and thermally conductive resins. In other embodiments, the prepregs have substrate materials that include carbon. In other embodiments, the prepregs include substrates impregnated with thermally conductive resins. In other embodiments, the printed wiring board structures include electrically and thermally conductive laminates that can act as ground and/or power planes.Type: GrantFiled: December 11, 2001Date of Patent: March 22, 2005Assignee: ThermalWorks, Inc.Inventors: Kalu K. Vasoya, Bharat M. Mangrolia, William E. Davis, Richard A. Bohner
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Patent number: RE45637Abstract: Methods of manufacturing printed wiring boards including electrically conductive constraining cores that involve a single lamination cycle are disclosed. One example of the method of the invention includes drilling a clearance pattern in an electrically conductive constraining core, arranging the electrically conductive constraining core in a stack up that includes B-stage (semi-cured) layers of dielectric material on either side of the constraining core and additional layers of material arranged to form the at least one functional layer, performing a lamination cycle on the stack up that causes the resin in the B-stage (semi-cured) layers of dielectric to reflow and fill the clearance pattern in the electrically conductive constraining core before curing and drilling plated through holes.Type: GrantFiled: June 8, 2012Date of Patent: July 28, 2015Assignee: Stablcor Technology, Inc.Inventor: Kalu K. Vasoya
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Patent number: D837171Type: GrantFiled: May 7, 2018Date of Patent: January 1, 2019Assignee: Adura LED Solutions LLCInventors: Kalu K. Vasoya, Abdullah Aslami
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Patent number: D856948Type: GrantFiled: November 28, 2018Date of Patent: August 20, 2019Assignee: ADURA LED SOLUTIONS LLCInventors: Kalu K. Vasoya, Abdullah Aslami, Ghanshyambhai Ramani
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Patent number: D893439Type: GrantFiled: May 3, 2019Date of Patent: August 18, 2020Inventors: Kalu K. Vasoya, Abdullah Aslami, Ghanshyambhai Ramani