Abstract: A mechanism is described for facilitating using of a shared local memory for register spilling/filling relating to graphics processors at computing devices. A method of embodiments, as described herein, includes reserving one or more spaces of a shared local memory (SLM) to perform one or more of spilling and filling relating to registers associated with a graphics processor of a computing device.

Abstract: An embodiment of a graphics processor pipeline apparatus may include a vertex fetcher to fetch vertices, a vertex shader communicatively coupled to the vertex fetcher to shade the fetched vertices, a primitive assembler communicatively coupled to the vertex shader to assemble primitives, and a primitive replicator communicatively coupled to the primitive assembler to replicate primitives for at least a first and a second viewport.

Abstract: A mechanism is described for facilitating using of a shared local memory for register spilling/filling relating to graphics processors at computing devices. A method of embodiments, as described herein, includes reserving one or more spaces of a shared local memory (SLM) to perform one or more of spilling and filling relating to registers associated with a graphics processor of a computing device.

Abstract: A mechanism is described for facilitating using of a shared local memory for register spilling/filling relating to graphics processors at computing devices. A method of embodiments, as described herein, includes reserving one or more spaces of a shared local memory (SLM) to perform one or more of spilling and filling relating to registers associated with a graphics processor of a computing device.

Abstract: A mechanism is described for facilitating using of a shared local memory for register spilling/filling relating to graphics processors at computing devices. A method of embodiments, as described herein, includes reserving one or more spaces of a shared local memory (SLM) to perform one or more of spilling and filling relating to registers associated with a graphics processor of a computing device.

Abstract: An apparatus and method for adaptive pixel hashing. For example, one embodiment of a method comprises: determining X and Y coordinates for a pixel block to be processed; performing a first lookup in a first data structure to identify a second data structure; performing a second lookup in the second data structure using the X and Y coordinates for the pixel block to identify a third data structure; performing a third lookup in a third data structure indexed based on the X and Y coordinates of the pixel block, the third lookup identifying an entry in the third data structure corresponding to the X and Y coordinates of the pixel block; reading information from the entry identifying an execution cluster to process the pixel block; and processing the pixel block by the execution cluster.

Abstract: An embodiment of a graphics processor pipeline apparatus may include a vertex fetcher to fetch vertices, a vertex shader communicatively coupled to the vertex fetcher to shade the fetched vertices, a primitive assembler communicatively coupled to the vertex shader to assemble primitives, and a primitive replicator communicatively coupled to the primitive assembler to replicate primitives for at least a first and a second viewport.

Abstract: An embodiment of a graphics processor pipeline apparatus may include a vertex fetcher to fetch vertices, a vertex shader communicatively coupled to the vertex fetcher to shade the fetched vertices, a primitive assembler communicatively coupled to the vertex shader to assemble primitives, and a primitive replicator communicatively coupled to the primitive assembler to replicate primitives for at least a first and a second viewport.

Abstract: An apparatus and method for adaptive pixel hashing. For example, one embodiment of a method comprises: determining X and Y coordinates for a pixel block to be processed; performing a first lookup in a first data structure to identify a second data structure; performing a second lookup in the second data structure using the X and Y coordinates for the pixel block to identify a third data structure; performing a third lookup in a third data structure indexed based on the X and Y coordinates of the pixel block, the third lookup identifying an entry in the third data structure corresponding to the X and Y coordinates of the pixel block; reading information from the entry identifying an execution cluster to process the pixel block; and processing the pixel block by the execution cluster.

Abstract: An embodiment of a graphics processor pipeline apparatus may include a vertex fetcher to fetch vertices, a vertex shader communicatively coupled to the vertex fetcher to shade the fetched vertices, a primitive assembler communicatively coupled to the vertex shader to assemble primitives, and a primitive replicator communicatively coupled to the primitive assembler to replicate primitives for at least a first and a second viewport.

Abstract: Marking “Clipped Triangles” as visible triangles for all tiles may be avoided by instead finding an approximate clipping area and marking the triangles as visible only in those tiles in the Position Only Shading Pipe (POSH) pipe. This avoids rendering the triangle in the replay pipe in those tiles where it may not be visible.

Abstract: An apparatus and method for adaptive pixel hashing. For example, one embodiment of a method comprises: determining X and Y coordinates for a pixel block to be processed; performing a first lookup in a first data structure to identify a second data structure; performing a second lookup in the second data structure using the X and Y coordinates for the pixel block to identify a third data structure; performing a third lookup in a third data structure indexed based on the X and Y coordinates of the pixel block, the third lookup identifying an entry in the third data structure corresponding to the X and Y coordinates of the pixel block; reading information from the entry identifying an execution cluster to process the pixel block; and processing the pixel block by the execution cluster.

Abstract: In position-only shading, two geometry pipes exist, a trimmed down version called the Cull Pipe and a full version called the Replay Pipe. Thus, the Cull Pipe executes the position shaders in parallel with the main application, but typically generates the critical results much faster as it fetches and shades only the position attribute of the vertices and avoids the rasterization as well as the rendering of pixels for the frame buffer. Furthermore, the Cull Pipe uses these critical results to compute visibility information for all the triangles whether they are culled or not. On the other hand, the Replay Pipe consumes the visibility information to skip the culled triangles and shades only the visible triangles that are finally passed to the rasterization phase. Together the two pipes can hide the long cull runs of discarded triangles and can complete the work faster in some embodiments.

Abstract: Marking “Clipped Triangles” as visible triangles for all tiles may be avoided by instead finding an approximate clipping area and marking the triangles as visible only in those tiles in the posh pipe. This avoids rendering the triangle in the replay pipe in those tiles where it may not be visible.

Abstract: An apparatus and method for adaptive pixel hashing. For example, one embodiment of a method comprises: determining X and Y coordinates for a pixel block to be processed; performing a first lookup in a first data structure to identify a second data structure; performing a second lookup in the second data structure using the X and Y coordinates for the pixel block to identify a third data structure; performing a third lookup in a third data structure indexed based on the X and Y coordinates of the pixel block, the third lookup identifying an entry in the third data structure corresponding to the X and Y coordinates of the pixel block; reading information from the entry identifying an execution cluster to process the pixel block; and processing the pixel block by the execution cluster.

Abstract: In position-only shading, two geometry pipes exist, a trimmed down version called the Cull Pipe and a full version called the Replay Pipe. Thus, the Cull Pipe executes the position shaders in parallel with the main application, but typically generates the critical results much faster as it fetches and shades only the position attribute of the vertices and avoids the rasterization as well as the rendering of pixels for the frame buffer. Furthermore, the Cull Pipe uses these critical results to compute visibility information for all the triangles whether they are culled or not. On the other hand, the Replay Pipe consumes the visibility information to skip the culled triangles and shades only the visible triangles that are finally passed to the rasterization phase. Together the two pipes can hide the long cull runs of discarded triangles and can complete the work faster in some embodiments.

Abstract: Methods and hardware may process single plane clipping operations using a pipeline specialized for single plane clipping. A second pipeline may be provided to handle clipping in multi-clipping plane cases. By optimizing the hardware and methods around single plane clipping, polygon throughput may be enhanced.