Patents by Inventor Kamal Tabatabaie
Kamal Tabatabaie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11239326Abstract: A Field Effect Transistor (FET) structure having: a semiconductor; a first electrode structure; a second electrode structure; and a third electrode structure for controlling a flow of carriers in the semiconductor between the first electrode structure and the second electrode structure; a dielectric structure disposed over the semiconductor and extending horizontally between first electrode structure, the second electrode structure and the third electrode structure; and a fourth electrode passing into the dielectric structure and terminating a predetermined, finite distance above the semiconductor for controlling an electric field in the semiconductor under the fourth electrode structure.Type: GrantFiled: April 11, 2019Date of Patent: February 1, 2022Assignee: RAYTHEON COMPANYInventors: Jeffrey R. LaRoche, Kelly P. Ip, Thomas E. Kazior, Kamal Tabatabaie Alavi
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Patent number: 11038030Abstract: A Field Effect Transistor (FET) having a source, drain, and gate disposed laterally along a surface of a semiconductor and a field plate structure: having one end connected to the source; and having a second end disposed between the gate and the drain and separated from the drain by a gap. A dielectric structure is disposed over the semiconductor, having: a first portion disposed under the second end of the field plate structure; and, a second, thinner portion under the gap.Type: GrantFiled: April 13, 2020Date of Patent: June 15, 2021Assignee: Raytheon CompanyInventors: Christopher J. MacDonald, Kenneth A. Wilson, Kamal Tabatabaie Alavi, Adrian D. Williams
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Patent number: 10840114Abstract: Apparatus and method for heating a wafer having semiconductor material. The apparatus includes: a chamber, a source of radiant heat; a source of gas; and a susceptor disposed in the chamber to receive and absorb heat radiated by the source of radiant heat; the susceptor having an opening therein to allow a flow of gas to pass from the source of gas to pass through an interior region of the susceptor and over the wafer.Type: GrantFiled: April 24, 2017Date of Patent: November 17, 2020Assignee: Raytheon CompanyInventors: Kezia Cheng, Christopher J. MacDonald, Kamal Tabatabaie Alavi, Adrian D. Williams
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Publication number: 20200243652Abstract: A Field Effect Transistor (FET) having a source, drain, and gate disposed laterally along a surface of a semiconductor and a field plate structure: having one end connected to the source; and having a second end disposed between the gate and the drain and separated from the drain by a gap. A dielectric structure is disposed over the semiconductor, having: a first portion disposed under the second end of the field plate structure; and, a second, thinner portion under the gap.Type: ApplicationFiled: April 13, 2020Publication date: July 30, 2020Applicant: Raytheon CompanyInventors: Christopher J. MacDonald, Kenneth A. Wilson, Kamal Tabatabaie Alavi, Adrian D. Williams
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Patent number: 10720497Abstract: A Field Effect Transistor (FET) having a source, drain, and gate disposed laterally along a surface of a semiconductor and a field plate structure: having one end connected to the source; and having a second end disposed between the gate and the drain and separated from the drain by a gap. A dielectric structure is disposed over the semiconductor, having: a first portion disposed under the second end of the field plate structure; and, a second, thinner portion under the gap.Type: GrantFiled: October 24, 2017Date of Patent: July 21, 2020Assignee: Raytheon CompanyInventors: Christopher J. MacDonald, Kenneth A. Wilson, Kamal Tabatabaie Alavi, Adrian D. Williams
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Patent number: 10541148Abstract: A stack of layers providing an ohmic contact with the semiconductor, a lower metal layer of the stack is disposed in direct contact with the semiconductor; and a radiation absorption control layer disposed over the lower layer for controlling an amount of the radiant energy to be absorbed in the radiation absorption control layer during exposure of the stack to the radiation during a process used to alloy the stack with the semiconductor to form the ohmic contact.Type: GrantFiled: December 14, 2018Date of Patent: January 21, 2020Assignee: Raytheon CompanyInventors: Kezia Cheng, Kamal Tabatabaie Alavi, Adrian D. Williams, Christopher J. MacDonald, Kiuchul Hwang
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Patent number: 10439035Abstract: A Schottky contact structure for a semiconductor device having a Schottky contact and an electrode for the contact structure disposed on the contact. The Schottky contact comprises: a first layer of a first metal in Schottky contact with a semiconductor; a second layer of a second metal on the first layer; a third layer of the first metal on the second layer; and a fourth layer of the second metal on the third layer. The electrode for the Schottky contact structure disposed on the Schottky contact comprises a third metal, the second metal providing a barrier against migration between the third metal and the first metal.Type: GrantFiled: July 12, 2018Date of Patent: October 8, 2019Assignee: Raytheon CompanyInventors: Kamal Tabatabaie-Alavi, Kezia Cheng, Christopher J. MacDonald
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Publication number: 20190237554Abstract: A Field Effect Transistor (FET) structure having: a semiconductor; a first electrode structure; a second electrode structure; and a third electrode structure for controlling a flow of carriers in the semiconductor between the first electrode structure and the second electrode structure; a dielectric structure disposed over the semiconductor and extending horizontally between first electrode structure, the second electrode structure and the third electrode structure; and a fourth electrode passing into the dielectric structure and terminating a predetermined, finite distance above the semiconductor for controlling an electric field in the semiconductor under the fourth electrode structure.Type: ApplicationFiled: April 11, 2019Publication date: August 1, 2019Applicant: Raytheon CompanyInventors: Jeffrey R. LaRoche, Kelly P. Ip, Thomas E. Kazior, Kamal Tabatabaie Alavi
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Publication number: 20190198346Abstract: A stack of layers providing an ohmic contact with the semiconductor, a lower metal layer of the stack is disposed in direct contact with the semiconductor; and a radiation absorption control layer disposed over the lower layer for controlling an amount of the radiant energy to be absorbed in the radiation absorption control layer during exposure of the stack to the radiation during a process used to alloy the stack with the semiconductor to form the ohmic contact.Type: ApplicationFiled: December 14, 2018Publication date: June 27, 2019Applicant: Raytheon CompanyInventors: Kezia Cheng, Kamal Tabatabaie Alavi, Adrian D. Williams, Christopher J. MacDonald, Kiuchul Hwang
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Publication number: 20190123150Abstract: A Field Effect Transistor (FET) having a source, drain, and gate disposed laterally along a surface of a semiconductor and a field plate structure: having one end connected to the source; and having a second end disposed between the gate and the drain and separated from the drain by a gap. A dielectric structure is disposed over the semiconductor, having: a first portion disposed under the second end of the field plate structure; and, a second, thinner portion under the gap.Type: ApplicationFiled: October 24, 2017Publication date: April 25, 2019Applicant: Raytheon CompanyInventors: Christopher J. MacDonald, Kenneth A. Wilson, Kamal Tabatabaie Alavi, Adrian D. Williams
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Publication number: 20190097001Abstract: A Field Effect Transistor (FET) structure having: a semiconductor; a first electrode structure; a second electrode structure; and a third electrode structure for controlling a flow of carriers in the semiconductor between the first electrode structure and the second electrode structure; a dielectric structure disposed over the semiconductor and extending horizontally between first electrode structure, the second electrode structure and the third electrode structure; and a fourth electrode passing into the dielectric structure and terminating a predetermined, finite distance above the semiconductor for controlling an electric field in the semiconductor under the fourth electrode structure.Type: ApplicationFiled: September 25, 2017Publication date: March 28, 2019Applicant: Raytheon CompanyInventors: Jeffrey R. LaRoche, Kelly P. Ip, Thomas E. Kazior, Kamal Tabatabaie Alavi
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Publication number: 20180323274Abstract: A Schottky contact structure for a semiconductor device having a Schottky contact and an electrode for the contact structure disposed on the contact. The Schottky contact comprises: a first layer of a first metal in Schottky contact with a semiconductor; a second layer of a second metal on the first layer; a third layer of the first metal on the second layer; and a fourth layer of the second metal on the third layer. The electrode for the Schottky contact structure disposed on the Schottky contact comprises a third metal, the second metal providing a barrier against migration between the third metal and the first metal.Type: ApplicationFiled: July 12, 2018Publication date: November 8, 2018Applicant: Raytheon CompanyInventors: Kamal Tabatabaie-Alavi, Kezia Cheng, Christopher J. MacDonald
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Patent number: 10026823Abstract: A Schottky contact structure for a semiconductor device having a Schottky contact and an electrode for the contact structure disposed on the contact. The Schottky contact comprises: a first layer of a first metal in Schottky contact with a semiconductor; a second layer of a second metal on the first layer; a third layer of the first metal on the second layer; and a fourth layer of the second metal on the third layer. The electrode for the Schottky contact structure disposed on the Schottky contact comprises a third metal, the second metal providing a barrier against migration between the third metal and the first metal.Type: GrantFiled: March 8, 2017Date of Patent: July 17, 2018Assignee: Raytheon CompanyInventors: Kamal Tabatabaie-Alavi, Kezia Cheng, Christopher J. MacDonald
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Patent number: 10014266Abstract: A method and structure, the structure having a substrate, an active device in an active device semiconductor region; of the substrate, a microwave transmission line, on the substrate, electrically connected to the active device, and microwave energy absorbing “dummy” fill elements on the substrate. The method includes providing a structure having a substrate, an active device region on a surface of the structure, an ohmic contact material on the active device region, and a plurality of “dummy” fill elements on the surface to provide uniform heating of the substrate during a rapid thermal anneal process, the ohmic contact material and the “dummy” fill elements having the same radiant energy reflectivity. The rapid thermal anneal processing forms an ohmic contact between an ohmic contact material and the active device region and simultaneously converts the “dummy” fill elements into microwave lossy “dummy” fill elements.Type: GrantFiled: July 26, 2016Date of Patent: July 3, 2018Assignee: Raytheon CompanyInventors: Fikret Altunkilic, Adrian D. Williams, Christopher J. MacDonald, Kamal Tabatabaie Alavi
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Publication number: 20180033744Abstract: A method and structure, the structure having a substrate, an active device in an active device semiconductor region; of the substrate, a microwave transmission line, on the substrate, electrically connected to the active device, and microwave energy absorbing “dummy” fill elements on the substrate. The method includes providing a structure having a substrate, an active device region on a surface of the structure, an ohmic contact material on the active device region, and a plurality of “dummy” fill elements on the surface to provide uniform heating of the substrate during a rapid thermal anneal process, the ohmic contact material and the “dummy” fill elements having the same radiant energy reflectivity. The rapid thermal anneal processing forms an ohmic contact between an ohmic contact material and the active device region and simultaneously converts the “dummy” fill elements into microwave lossy “dummy” fill elements.Type: ApplicationFiled: July 26, 2016Publication date: February 1, 2018Applicant: Raytheon CompanyInventors: Fikret Altunkilic, Adrian D. Williams, Christopher J. MacDonald, Kamal Tabatabaie Alavi
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Patent number: 9219000Abstract: Forming an alignment mark on a semiconductor structure using an optical lithography to form a metal alignment mark on a substrate of the structure, using the formed metal alignment mark to form a first feature of a semiconductor device being formed on the substrate using optical lithography, and using the formed metal alignment mark to form a second, different feature for the semiconductor using electron beam lithography. In one embodiment, the first feature is an ohmic contact, the second feature is a Schottky contact, the metal alignment mark is a refractory metal or a refractory metal compound having an atomic weight greater than 60 such as TaN and the semiconductor device is a GaN semiconductor device. A semiconductor structure having a metal alignment mark on a zero layer of the structure, the metal alignment mark is a TaN and the semiconductor is GaN.Type: GrantFiled: March 26, 2014Date of Patent: December 22, 2015Assignee: RAYTHEON COMPANYInventors: Paul J. Duval, Kamal Tabatabaie, William J. Davis
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Patent number: 8853745Abstract: A semiconductor structure, comprising: a substrate; a seed layer over an upper surface of the substrate; a semiconductor layer disposed over the seed layer; a transistor device in the semiconductor layer; wherein the substrate has an aperture therein, such aperture extending from a bottom surface of the substrate and terminating on a bottom surface of the seed layer; and an opto-electric structure disposed on the bottom surface of the seed layer.Type: GrantFiled: January 20, 2009Date of Patent: October 7, 2014Assignee: Raytheon CompanyInventors: Kamal Tabatabaie, Jeffrey R. LaRoche, Valery S. Kaper, John P. Bettencourt, Kelly P. Ip
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Publication number: 20140206173Abstract: Forming an alignment mark on a semiconductor structure using an optical lithography to form a metal alignment mark on a substrate of the structure, using the formed metal alignment mark to form a first feature of a semiconductor device being formed on the substrate using optical lithography, and using the formed metal alignment mark to form a second, different feature for the semiconductor using electron beam lithography. In one embodiment, the first feature is an ohmic contact, the second feature is a Schottky contact, the metal alignment mark is a refractory metal or a refractory metal compound having an atomic weight greater than 60 such as TaN and the semiconductor device is a GaN semiconductor device. A semiconductor structure having a metal alignment mark on a zero layer of the structure, the metal alignment mark is a TaN and the semiconductor is GaN.Type: ApplicationFiled: March 26, 2014Publication date: July 24, 2014Applicant: RAYTHEON COMPANYInventors: Paul J. Duval, Kamal Tabatabaie, William J. Davis
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Patent number: 8772786Abstract: A semiconductor structure having mesa structure comprising: a lower semiconductor layer; an upper semiconductor layer having a higher band gap than, and in direct contact with, the lower semiconductor layer to form a two-dimension electron gas (2DEG) region between the upper semiconductor layer. The 2DEG region has outer edges terminating at sidewalls of the mesa. An additional electron donor layer has a band gap higher than the band gap of the lower layer disposed on sidewall portions of the mesa structure and on the region of the 2DEG region terminating at sidewalls of the mesa. An ohmic contact material is disposed on the electron donor layer. In effect, a sideway HEMT is formed with the electron donor layer, the 2DEG region and the ohmic contact material increasing the concentration of electrons (i.e., lowering ohmic contact résistance) all along the contact between the lower semiconductor layer and the electron donor layer.Type: GrantFiled: July 13, 2012Date of Patent: July 8, 2014Assignee: Raytheon CompanyInventors: Kamal Tabatabaie, William E. Hoke, Eduardo M. Chumbes, Kevin McCarthy
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Patent number: 8754421Abstract: Forming an alignment mark on a semiconductor structure using an optical lithography to form a metal alignment mark on a substrate of the structure, using the formed metal alignment mark to form a first feature of a semiconductor device being formed on the substrate using optical lithography, and using the formed metal alignment mark to form a second, different feature for the semiconductor using electron beam lithography. In one embodiment, the first feature is an ohmic contact, the second feature is a Schottky contact, the metal alignment mark is a refractory metal or a refractory metal compound having an atomic weight greater than 60 such as TaN and the semiconductor device is a GaN semiconductor device. A semiconductor structure having a metal alignment mark on a zero layer of the structure, the metal alignment mark is a TaN and the semiconductor is GaN.Type: GrantFiled: February 24, 2012Date of Patent: June 17, 2014Assignee: Raytheon CompanyInventors: Paul J. Duval, Kamal Tabatabaie, William J. Davis