Patents by Inventor Kamel Musa Khalaf

Kamel Musa Khalaf has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for digital only secure test mode entry
    Patent number: 11144677
    Abstract: A fully digital integrated circuit apparatus (200) and method (300) are provided for generating a test mode enable signal with a digital non-resettable state retention storage circuit (210) connected to store an authentication control pattern for authorizing test mode access to a secure circuit, a digital safety interlock gate circuit (220) connected to store a safety interlock gate setting that may be accessed independently from a test mode enable signal, and combinatorial logic circuitry (205) for generating the test mode enable signal only when the interlock safety gate setting is set to a first value and the digital non-resettable state retention storage circuit stores the authentication control code.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: October 12, 2021
    Assignee: NXP USA, Inc.
    Inventors: Stefan Doll, Thomas Henry Luedeke, Nikila Krishnamoorthy, Hubert Glenn Carson, Jr., Anurag Jindal, Hilario Manuel Garza, Kamel Musa Khalaf, Joel Ray Knight, Adrian Lee Carleton
  • Method and Apparatus for Digital Only Secure Test Mode Entry
    Publication number: 20210042447
    Abstract: A fully digital integrated circuit apparatus (200) and method (300) are provided for generating a test mode enable signal with a digital non-resettable state retention storage circuit (210) connected to store an authentication control pattern for authorizing test mode access to a secure circuit, a digital safety interlock gate circuit (220) connected to store a safety interlock gate setting that may be accessed independently from a test mode enable signal, and combinatorial logic circuitry (205) for generating the test mode enable signal only when the interlock safety gate setting is set to a first value and the digital non-resettable state retention storage circuit stores the authentication control code.
    Type: Application
    Filed: August 8, 2019
    Publication date: February 11, 2021
    Applicant: NXP USA, Inc.
    Inventors: Stefan Doll, Thomas Henry Luedeke, Nikila Krishnamoorthy, Hubert Glenn Carson, JR., Anurag Jindal, Hilario Manuel Garza, Kamel Musa Khalaf, Joel Ray Knight, Adrian Lee Carleton