Patents by Inventor Kameswara Goutham Vankayalapati

Kameswara Goutham Vankayalapati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10515182
    Abstract: A non-transitory computer-readable medium includes instructions that, when provided to and executed by a processor, cause the processor to receive a first placement of domain instances of an integrated circuit layout provided as a tile having a group of multiple power domain modules. The first placement of domain instances is scanned to identify instances associated with a preselected power specification. A heuristic is applied to the first placement of domain instances to form an observation area. The heuristic demarcates select instances to form the observation area. Each instance associated with the preselected power specification is identified in the observation area. A contiguous region of instances is formed from the select instances in the observation area. The first placement of domain instances in the integrated circuit layout is modified to provided revised placement for instances associated with the contiguous region of instances.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: December 24, 2019
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Elsie Lo, Erhan Ergin, Dipanjan Sengupta, Rajit Seahra, Sowmya Thikkavarapu, Kameswara Goutham Vankayalapati
  • Publication number: 20190004588
    Abstract: A non-transitory computer-readable medium includes instructions that, when provided to and executed by a processor, cause the processor to receive a first placement of domain instances of an integrated circuit layout provided as a tile having a group of multiple power domain modules. The first placement of domain instances is scanned to identify instances associated with a preselected power specification. A heuristic is applied to the first placement of domain instances to form an observation area. the heuristic demarcates select instances to form the observation area. Each instance associated with the preselected power specification is identified in the observation area. A contiguous region of instances is formed from the select instances in the observation area. The first placement of domain instances in the integrated circuit layout is modified to provided revised placement for instances associated with the contiguous region of instances.
    Type: Application
    Filed: June 30, 2017
    Publication date: January 3, 2019
    Applicant: ATI Technologies ULC
    Inventors: Elsie Lo, Erhan Ergin, Dipanjan Sengupta, Rajit Seahra, Sowmya Thikkavarapu, Kameswara Goutham Vankayalapati