Abstract: A system comprising a plurality of processing devices is arranged for performing an algorithm having a plurality of computational tasks. The plurality of processing devices are interconnected with each other. A control logic module is adapted to select an implementation of the algorithm among a plurality of implementations. At least a part of the control logic module resides in one of the processing devices and the implementation is selected according to at least one criterion of (latency requirements, computational power, resource availability, data locality, privacy requirements, precision requirements, hardware capabilities, distance, location, acoustical performance requirements, energy efficiency, orientation) and in the selected implementation the plurality of computational tasks of the algorithm is distributed over at least two of the processing devices.

Abstract: A system comprising a plurality of processing devices is arranged for performing an algorithm having a plurality of computational tasks. The plurality of processing devices are interconnected with each other. A control logic module is adapted to select an implementation of the algorithm among a plurality of implementations. At least a part of the control logic module resides in one of the processing devices and the implementation is selected according to at least one criterion of (latency requirements, computational power, resource availability, data locality, privacy requirements, precision requirements, hardware capabilities, distance, location, acoustical performance requirements, energy efficiency, orientation) and in the selected implementation the plurality of computational tasks of the algorithm is distributed over at least two of the processing devices.