Patents by Inventor Kamil Synek

Kamil Synek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for automatic configuration of multiple on-chip interconnects
    Patent number: 7603441
    Abstract: A method and apparatus for automatic configuration of multiple on-chip interconnects have been described. In one embodiment, the invention reduces the configuration time of several on-chip network features, and also ensures that these features are configured correctly to minimize errors in a design.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: October 13, 2009
    Assignee: Sonics, Inc.
    Inventors: Kamil Synek, Chien-Chun Chou, Wolf-Dietrich Weber
  • Method and apparatus for optimizing distributed multiplexed bus interconnects
    Patent number: 7412670
    Abstract: Methods and apparatuses for optimizing distributed multiplexed bus interconnects are described. Parameters of components that make up a distributed multiplexed bus interconnect may be optimized, such as an amount of area on a chip occupied by the component, an amount of power consumed by the component, etc., while satisfying existing timing constraints between nodes of a distributed multiplexed bus interconnect.
    Type: Grant
    Filed: April 1, 2005
    Date of Patent: August 12, 2008
    Assignee: Sonics, Inc.
    Inventors: Michael Jude Meyer, Scott C. Evans, Kamil Synek
  • Composing on-chip interconnects with configurable interfaces
    Patent number: 7356633
    Abstract: Embodiments of apparatuses, systems, and methods are described for composing on-chip interconnects with configurable interfaces. A configurable interface includes a configurable agent and interface port. The configurable agent has a first input and a first output with the first input receiving a first communication. An input of a core receives the configurable agent's first output. The agent is configured for important inter-network characteristics such as topology, flooding control, clocking/reset, and performance enhancement.
    Type: Grant
    Filed: May 3, 2002
    Date of Patent: April 8, 2008
    Assignee: Sonics, Inc.
    Inventors: Wolf-Dietrich Weber, Chien-Chun Chou, Nabil N. Masri, Michael Jude Meyer, Thomas Wayne O'Connell, Kamil Synek, Jay Scott Tomlinson, Drew Eric Wingard
  • On-chip inter-network performance optimization using configurable performance parameters
    Patent number: 7254603
    Abstract: A method and apparatus for on-chip inter-network performance optimization using configurable performance parameters have been described.
    Type: Grant
    Filed: May 3, 2002
    Date of Patent: August 7, 2007
    Assignee: Sonics, Inc.
    Inventors: Wolf-Dietrich Weber, Chien-Chun Chou, Nabil N. Masri, Michael Jude Meyer, Thomas Wayne O'Connell, Kamil Synek, Jay Scott Tomlinson, Drew Eric Wingard
  • Various methods and apparatuses for flexible hierarchy grouping
    Publication number: 20060225015
    Abstract: Methods and apparatuses are described for incorporating floor planning information into a configuration process by generating a definition of a floor plan grouping of interconnect components during a front-end view design process for the interconnect. Further, a user is permitted to combine components from separate IP block representations of interconnects during the front-end view design process, based upon physical location of the grouping of the components making up the interconnects on the chip.
    Type: Application
    Filed: March 31, 2005
    Publication date: October 5, 2006
    Inventors: Kamil Synek, Jay Tomlinson
  • Method and apparatus for optimizing distributed multiplexed bus interconnects
    Publication number: 20050172244
    Abstract: A method and apparatus for optimizing distributed multiplexed bus interconnects are described.
    Type: Application
    Filed: April 1, 2005
    Publication date: August 4, 2005
    Inventors: Michael Meyer, Scott Evans, Kamil Synek
  • Method and apparatus for optimizing distributed multiplexed bus interconnects
    Patent number: 6880133
    Abstract: A method and apparatus for optimizing distributed multiplexed bus interconnects are described. The multiplexed bus interconnect contains one or more multiplexers to route signals through the bus interconnect. An amount of signaling wiring present within a distributed multiplexed bus interconnect is optimized by eliminating individual signaling wires based upon whether an Intellectual Property core connected to the multiplexed bus interconnect transmits or receives signals from the distributed multiplexed bus interconnect.
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: April 12, 2005
    Assignee: Sonics, Inc.
    Inventors: Michael Jude Meyer, Scott C. Evans, Kamil Synek
  • Method and apparatus for automatic configuration of multiple on-chip interconnects
    Publication number: 20040128341
    Abstract: A method and apparatus for automatic configuration of multiple on-chip interconnects have been described. In one embodiment, the invention reduces the configuration time of several on-chip network features, and also ensures that these features are configured correctly to minimize errors in a design.
    Type: Application
    Filed: December 27, 2002
    Publication date: July 1, 2004
    Inventors: Kamil Synek, Chien-Chun Chou, Wolf-Dietrich Weber
  • Method and apparatus for optimizing distributed multiplexed bus interconnects
    Publication number: 20030217347
    Abstract: A method and apparatus for optimizing distributed multiplexed bus interconnects are described.
    Type: Application
    Filed: May 15, 2002
    Publication date: November 20, 2003
    Applicant: Sonics, Inc.
    Inventors: Michael J. Meyer, Scott C. Evans, Kamil Synek
  • On -chip inter-network performance optimization using configurable performance parameters
    Publication number: 20030208611
    Abstract: A method and apparatus for on-chip inter-network performance optimization using configurable performance parameters have been described.
    Type: Application
    Filed: May 3, 2002
    Publication date: November 6, 2003
    Applicant: Sonics, Inc.
    Inventors: Wolf-Dietrich Weber, Chien-Chun Chou, Nabil N. Masri, Michael J. Meyer, Thomas W. O'Connell, Kamil Synek, Jay S. Tomlinson, Drew E. Wingard
  • Composing on-chip interconnects with configurable interfaces
    Publication number: 20030208566
    Abstract: A method and apparatus for composing on-chip interconnects with configurable interfaces have been described.
    Type: Application
    Filed: May 3, 2002
    Publication date: November 6, 2003
    Applicant: Sonics, Inc.
    Inventors: Wolf-Dietrich Weber, Chien-Chun Chou, Nabil N. Masri, Michael J. Meyer, Thomas W. O'Connell, Kamil Synek, Jay S. Tomlinson, Drew E. Wingard