Patents by Inventor Kamlesh Mishra

Kamlesh Mishra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250124266
    Abstract: In one embodiment, an apparatus comprises a log circuit to: identify an input associated with a logarithm operation, wherein the logarithm operation is to be performed by the log circuit using piecewise linear approximation; identify a first range that the input falls within, wherein the first range is identified from a plurality of ranges associated with a plurality of piecewise linear approximation (PLA) equations for the logarithm operation, and wherein the first range corresponds to a first equation of the plurality of PLA equations; compute a result of the first equation based on a plurality of operands associated with the first equation; and return an output associated with the logarithm operation, wherein the output is generated based at least in part on the result of the first equation.
    Type: Application
    Filed: December 20, 2024
    Publication date: April 17, 2025
    Applicant: Intel Corporation
    Inventors: Kamlesh Pillai, Gurpreet S. Kalsi, Amit Mishra
  • Patent number: 12217155
    Abstract: In one embodiment, an apparatus comprises a log circuit to: identify an input associated with a logarithm operation, wherein the logarithm operation is to be performed by the log circuit using piecewise linear approximation; identify a first range that the input falls within, wherein the first range is identified from a plurality of ranges associated with a plurality of piecewise linear approximation (PLA) equations for the logarithm operation, and wherein the first range corresponds to a first equation of the plurality of PLA equations; compute a result of the first equation based on a plurality of operands associated with the first equation; and return an output associated with the logarithm operation, wherein the output is generated based at least in part on the result of the first equation.
    Type: Grant
    Filed: August 24, 2023
    Date of Patent: February 4, 2025
    Assignee: Intel Corporation
    Inventors: Kamlesh Pillai, Gurpreet S. Kalsi, Amit Mishra
  • Patent number: 9618965
    Abstract: A system for dynamically calibrating operational parameters of a Device Under Test (DUT) includes a signal generator for generating a data pattern, a DUT structured to generate a clock signal, an oscilloscope structured to measure margins of the generated clock signal compared to an eye-diagram produced on the oscilloscope from the data pattern, and a calibration unit. The calibration unit can produce a candidate a jitter value for the signal generator, receive a determination from the oscilloscope whether the data pattern generated with the candidate jitter value causes the DUT to produce the generated clock signal within a pre-determined tolerance level, and modify the jitter value accordingly. The calibration unit may also be further structured to generate voltage swing values.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: April 11, 2017
    Assignee: Tektronix, Inc.
    Inventors: Ganesh K. Kumar, Krishna N H Sri, Madhusudhan Acharya, Kamlesh Mishra
  • Publication number: 20160334833
    Abstract: A system for dynamically calibrating operational parameters of a Device Under Test (DUT) includes a signal generator for generating a data pattern, a DUT structured to generate a clock signal, an oscilloscope structured to measure margins of the generated clock signal compared to an eye-diagram produced on the oscilloscope from the data pattern, and a calibration unit. The calibration unit can produce a candidate a jitter value for the signal generator, receive a determination from the oscilloscope whether the data pattern generated with the candidate jitter value causes the DUT to produce the generated clock signal within a pre-determined tolerance level, and modify the jitter value accordingly. The calibration unit may also be further structured to generate voltage swing values.
    Type: Application
    Filed: July 30, 2015
    Publication date: November 17, 2016
    Inventors: Ganesh K. Kumar, Krishna N H Sri, Madhusudhan Acharya, Kamlesh Mishra