Patents by Inventor Kamlesh Singh
Kamlesh Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11983529Abstract: Systems, computer program products, and methods are described herein for detection and recordation of functional code logic components on a distributed development platform. The present invention is configured to retrieve, from a source code repository, a source code script, wherein the source code script is associated with a first user; initiate a machine learning model on the source code script; determine, using the machine learning model, at least one functional code logic component from the source code script; initiate an NFT source code mapping engine on the at least one functional code logic component; generate, using the NFT source code mapping engine, a NFT for the at least one functional code logic component, wherein the NFT comprises the at least one functional code logic component and information associated with the first user; and record the NFT in a distributed ledger.Type: GrantFiled: January 18, 2022Date of Patent: May 14, 2024Assignee: BANK OF AMERICA CORPORATIONInventors: Shailendra Singh, Kamlesh Kanayalal Gangaramani
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Publication number: 20240137034Abstract: A time-interleaved analog to digital converter (ADC) circuit includes an input signal amplitude detector configured to determine an input signal amplitude of an analog input signal, a multi-tone signal generator configured to generate a plurality of analog and digital sinusoidal signals having an amplitude dependent on the determined input signal amplitude, and an analog input summing module configured to provide a summed output analog signal from the analog input signal and the analog sinusoidal signals. A time-interleaved ADC has an input coupled to receive the summed output analog signal from the analog input summing module and configured to provide a timing skew-calibrated digital output signal from the summed output analog signal. A digital output subtractor module is configured to provide a digital output signal at an output of the circuit from the digital output signal from the time-interleaved ADC and the digital sinusoidal signals from the multi-tone signal generator.Type: ApplicationFiled: April 6, 2023Publication date: April 25, 2024Inventors: Sushil Kumar Gupta, Kamlesh Singh
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Patent number: 11952543Abstract: The present invention relates to a process for production of high yield of hydrogen by carrying out the dry reforming of the dry gas generated from the process itself by utilizing the same catalyst for cracking and producing high yield of light olefins such as ethylene, propylene and butylenes from residue feedstocks.Type: GrantFiled: November 11, 2020Date of Patent: April 9, 2024Assignee: INDIAN OIL CORPORATION LIMITEDInventors: Sadhullah Mukthiyar, Gadari Saidulu, Manoj Kumar Bhuyan, Kamlesh Gupta, Madhusudan Sau, Gurpreet Singh Kapur, Sankara Sri Venkata Ramakumar
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Patent number: 11949414Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to improve in-memory multiply and accumulate operations. An example apparatus includes a first multiplexer in a subarray of memory, the first multiplexer to receive first values representative of a column of a lookup table (LUT) including entries to represent products of four-bit numbers and return second values from an intersection of a row and the column of the LUT based on a first element of a first operand; shift and adder logic in the subarray, the shift and adder logic to shift the second values based on at least one of the first element of the first operand or a first element of a second operand; and accumulation storage in the subarray, the accumulation storage to store at least the shifted second values.Type: GrantFiled: December 22, 2020Date of Patent: April 2, 2024Assignee: INTEL CORPORATIONInventors: Gurpreet Singh Kalsi, Akshay Krishna Ramanathan, Kamlesh Pillai, Sreenivas Subramoney, Srivatsa Rangachar Srinivasa, Anirud Thyagharajan, Om Ji Omer, Saurabh Jain
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Patent number: 11698490Abstract: The present disclosure relates to a method of forming a tapered optical fiber, where the optical fiber has a cladding encasing a core and has an initial outer diameter. The method involves applying opposing forces to spaced apart sections of the optical fiber. The spaced apart sections define a length portion representing a waist region. While applying the opposing forces, simultaneously applying heat to the waist region to gradually produce a taper of the optical fiber within the waist region. The taper has a first diameter at a midpoint of the waist region which is less than the initial outer diameter. An etch operation is then performed by chemically etching at least a subportion of the waist region of the optical fiber to reduce the subportion to a second diameter which is less than the first diameter.Type: GrantFiled: August 31, 2021Date of Patent: July 11, 2023Assignee: Lawrence Livermore National Security, LLCInventors: Tiziana C. Bond, Sara Elizabeth Harrison, Catherine E. Reinhardt, Payal Kamlesh Singh, Victor V. Khitrov
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Patent number: 11674855Abstract: A temperature-to-digital converter includes a temperature sensor circuit, an analog-to-digital converter (ADC), and a digital processing circuit. The temperature sensor circuit is configured to generate first and second complementary-to-absolute-temperature (CTAT) voltages based on a sensed absolute temperature. The ADC is configured to receive the first and second CTAT voltages. Further, during first and second conversion cycles of the ADC, the ADC is configured to receive the first and second CTAT voltages, and generate first and second digital voltages, respectively. The first and second digital voltages are generated based on the first and second CTAT voltages, respectively, and a difference between the first and second CTAT voltages. The digital processing circuit is configured to generate, based on the first and second digital voltages, a temperature output voltage that is independent of a gain of the ADC and a digital representation of the absolute temperature.Type: GrantFiled: September 14, 2020Date of Patent: June 13, 2023Assignee: NXP B.V.Inventor: Kamlesh Singh
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Publication number: 20230067875Abstract: The present disclosure relates to a method of forming a tapered optical fiber, where the optical fiber has a cladding encasing a core and has an initial outer diameter. The method involves applying opposing forces to spaced apart sections of the optical fiber. The spaced apart sections define a length portion representing a waist region. While applying the opposing forces, simultaneously applying heat to the waist region to gradually produce a taper of the optical fiber within the waist region. The taper has a first diameter at a midpoint of the waist region which is less than the initial outer diameter. An etch operation is then performed by chemically etching at least a subportion of the waist region of the optical fiber to reduce the subportion to a second diameter which is less than the first diameter.Type: ApplicationFiled: August 31, 2021Publication date: March 2, 2023Inventors: Tiziana C. BOND, Sara Elizabeth HARRISON, Catherine E. REINHARDT, Payal Kamlesh SINGH, Victor V. KHITROV
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Publication number: 20220144754Abstract: The invention relates to process for the preparation of midodrine or pharmaceutically acceptable salts thereof. The invention also relates to process for the preparation of intermediates of midodrine.Type: ApplicationFiled: November 10, 2021Publication date: May 12, 2022Inventors: Kumar Kamlesh Singh, Sanjay Jagdish Desai, Tadikonda Pratap V., Mahesh Laljibhai Rupapara
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Publication number: 20220082450Abstract: A temperature-to-digital converter includes a temperature sensor circuit, an analog-to-digital converter (ADC), and a digital processing circuit. The temperature sensor circuit is configured to generate first and second complementary-to-absolute-temperature (CTAT) voltages based on a sensed absolute temperature. The ADC is configured to receive the first and second CTAT voltages. Further, during first and second conversion cycles of the ADC, the ADC is configured to receive the first and second CTAT voltages, and generate first and second digital voltages, respectively. The first and second digital voltages are generated based on the first and second CTAT voltages, respectively, and a difference between the first and second CTAT voltages. The digital processing circuit is configured to generate, based on the first and second digital voltages, a temperature output voltage that is independent of a gain of the ADC and a digital representation of the absolute temperature.Type: ApplicationFiled: September 14, 2020Publication date: March 17, 2022Inventor: Kamlesh Singh
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Publication number: 20220064130Abstract: The invention relates to process for the preparation of isoxazoline-substituted benzamide compound and intermediates thereof. The invention also relates to process for the preparation of Fluralaner and intermediates thereof.Type: ApplicationFiled: September 2, 2021Publication date: March 3, 2022Inventors: Kumar Kamlesh SINGH, Sanjay Jagdish DESAI, Kuldeep Natwarlal JAIN, Jitesh Amratlal DESAI, Sarvil Dhirajbhai PATEL
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Patent number: 11254675Abstract: The invention relates to process for the preparation of grapiprant and its intermediates thereof. The invention also relates to grapiprant having a purity 98% or more and compounds of Formula (A), (B), (C) and (D) in an amount of 0.5 or less, relative to grapiprant, by area percentage of HPLC. The invention also relates to an amorphous form of grapiprant and process for preparation thereof.Type: GrantFiled: August 12, 2020Date of Patent: February 22, 2022Assignee: CADILA HEALTHCARE LIMITEDInventors: Kumar Kamlesh Singh, Jitendra Maganbhai Gajera, Sumer Singh Chundavat, Dipak Ambalal Patel
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Publication number: 20220023262Abstract: The present invention relates to a composition comprising high purity pyrrole derivative and method for preparation thereof. The present invention particularly relates to compositions comprising Saroglitazar magnesium having purity of 99.0% or more, and one or more of an aldehyde compound of Formula (II), diketo oxirane compound of Formula (III), hydroxy methyl compound of Formula (IV) or dimer compound of Formula (V), relative to saroglitazar magnesium, each present in an amount of about 0.15% or less, respectively, by weight, when measured by area percentage of HPLC.Type: ApplicationFiled: July 23, 2021Publication date: January 27, 2022Inventors: Kumar Kamlesh SINGH, Sanjay Jagdish DESAI, Piyush Rajendra SHARMA, Daya Ram PAL, Sanjeev Kumar TRIPATHI, Mayur Ramnikbhai PATEL
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Publication number: 20210347776Abstract: The invention relates to process for the preparation of grapiprant and its intermediates thereof. The invention also relates to grapiprant having a purity 98% or more and compounds of Formula (A), (B), (C) and (D) in an amount of 0.5 or less, relative to grapiprant, by area percentage of HPLC. The invention also relates to an amorphous form of grapiprant and process for preparation thereof.Type: ApplicationFiled: July 23, 2021Publication date: November 11, 2021Applicant: CADILA HEALTHCARE LIMITEDInventors: Kumar Kamlesh SINGH, Jitendra Maganbhai GAJERA, Sumer Singh CHUNDAVAT, Dipak Ambalal PATEL
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Publication number: 20210214306Abstract: The present invention relates to a process for the preparation of fosnetupitant. The invention further relates to an amorphous fosnetupitant chloride hydrochloride and process for the preparation thereof.Type: ApplicationFiled: January 13, 2021Publication date: July 15, 2021Applicant: CADILA HEALTHCARE LIMITEDInventors: Kumar Kamlesh SINGH, Sanjay Jagdish DESAI, Jagdish Maganbhai PATEL, Chirag Jayantilal VYAS, Dhaval Jashwantlal SOLANKI, Sudhir Ganpatbhai DHANANI
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Patent number: 10998917Abstract: A sigma-delta analog-to-digital converter (ADC) includes a feed-forward circuit, a finite-impulse-response (FIR) digital-to-analog converter (DAC), and a decimation filter. The feed-forward circuit is configured to receive an analog input signal and a feedback signal and generate a set of digital signals. Each feedback element of the FIR DAC includes a flip-flop and a reset circuit. The reset circuit is configured to receive a corresponding reset signal of a set of reset signals and output a reference output signal when the corresponding reset signal is deactivated. The reset signal of each feedback element is deactivated sequentially after each cycle of a clock signal that is received by the flip-flop associated with a corresponding reset circuit of each feedback element. The feedback signal is generated based on the reference output signal. The decimation filter is configured to generate a digital output signal based on the set of digital signals.Type: GrantFiled: July 14, 2020Date of Patent: May 4, 2021Assignee: NXP B.V.Inventor: Kamlesh Singh
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Publication number: 20210079000Abstract: The invention relates to process for the preparation of grapiprant and its intermediates thereof. The invention also relates to grapiprant having a purity 98% or more and compounds of Formula (A), (B), (C) and (D) in an amount of 0.5 or less, relative to grapiprant, by area percentage of HPLC. The invention also relates to an amorphous form of grapiprant and process for preparation thereof.Type: ApplicationFiled: August 12, 2020Publication date: March 18, 2021Applicant: CADILA HEALTHCARE LIMITEDInventors: Kumar Kamlesh SINGH, Jitendra Maganbhai GAJERA, Sumer Singh CHUNDAVAT, Dipak Ambalal PATEL
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Patent number: 10934269Abstract: The present invention relates to a process for the preparation of apalutamide. In particular, the present invention relates to a process for the preparation of apalutamide and its intermediates. The present invention also relates to pharmaceutical compositions comprising apalutamide.Type: GrantFiled: September 27, 2019Date of Patent: March 2, 2021Assignee: CADILA HEALTHCARE LIMITEDInventors: Kumar Kamlesh Singh, Nikhil Amar Singh, Ganpatdan Shimbhu Charan, Nimeshkumar Mukeshkumar Shah
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Publication number: 20200376017Abstract: An amorphous form of ertugliflozin and process for its preparation is described. A solid form of ertugliflozin and process for preparation thereof is also described.Type: ApplicationFiled: May 29, 2020Publication date: December 3, 2020Applicant: CADILA HEALTHCARE LIMITEDInventors: Sanjay Jagdish DESAI, Tadikonda PRATAP V., Mahesh Laljibhai RUPAPARA, Kumar Kamlesh SINGH, Hardik Bhikhubhai GHODASARA
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Patent number: 10807965Abstract: The present invention relates to a process for the preparation of apalutamide. In particular, the present invention relates to a process for the preparation of apalutamide and its intermediates. The present invention also relates to pharmaceutical compositions comprising apalutamide.Type: GrantFiled: March 27, 2019Date of Patent: October 20, 2020Assignee: CADILA HEALTHCARE LIMITEDInventors: Kumar Kamlesh Singh, Nikhil Amar Singh, Ganpat Dan Shimbhu Charan, Nimeshkumar Mukeshkumar Shah
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Publication number: 20200207738Abstract: The present invention relates to triaminopyrimidine compound 1, or pharmaceutically acceptable salts thereof, or hydrates, or solvates, or polymorphs, or optically active forms thereof, in solid state forms. The invention also relates to a process for preparation of triaminopyrimidine compound and intermediates thereof. The present invention also relates to a pharmaceutical composition comprising pure triaminopyrimidine compound, useful for preventing or treating malaria.Type: ApplicationFiled: September 4, 2018Publication date: July 2, 2020Inventors: Kumar Kamlesh SINGH, Nikhil Amar SINGH, Ganapatdan Shimbhu CHARAN, Nimeshkumar Mukeshkumar SHAH, Sunil Dnyaneshwar NARODE, Dipakkumar Dhanjibhai VACHHANI, Amol Kashinath PATIL, Sandip Pundlik KHAIRNAR