Abstract: Method and circuitry for efficiently boosting voltage for low power supply applications. In one embodiment a phase boosting circuit that boosts a clock signal to substantially twice the power supply voltage level in a single half-cycle is implemented. The circuit eliminates the need for depletion transistors and can thus be implemented using conventional complementary metal-oxide-semiconductor (CMOS) fabrication processes. A novel voltage summing circuit allows the phase doubler to achieve greater boosting capability for applications with ultra low power supply voltages.