Patents by Inventor Kan-Chiu Seto
Kan-Chiu Seto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10068721Abstract: In one embodiment, a hot swap circuit is disclosed. The hot swap circuit includes a first switch connected to a power input line. The hot swap circuit also includes a first capacitor connected to the first switch that is charged when the first switch is closed. The hot swap circuit further includes a second switch connected to the first switch and the first capacitor. The hot swap circuit additionally includes an input capacitor connected to the second switch and located in parallel with an input line to a power system. When the second switch is closed, the input capacitor is charged.Type: GrantFiled: April 27, 2017Date of Patent: September 4, 2018Assignee: Cisco Technology, Inc.Inventors: Michael Robert Grant, Yang Li, Jessica Leigh Kiefer, Kan Chiu Seto, Shobhana Punjabi
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Patent number: 9910811Abstract: In one embodiment, a hot swap circuit is disclosed. The hot swap circuit includes a capacitor in parallel with an input line to a power system. The hot swap circuit also includes a switch in parallel with the input line to the power system and coupled to the capacitor. The hot swap circuit further includes circuitry configured to pre-charge the capacitor to a first voltage while the switch is open. The switch is operable to cause the capacitor to be charged from the first voltage to a second voltage when the switch is closed.Type: GrantFiled: April 27, 2015Date of Patent: March 6, 2018Assignee: Cisco Technology, Inc.Inventors: Yang Li, Michael Robert Grant, Jessica Leigh Kiefer, Kan Chiu Seto
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Publication number: 20170229257Abstract: In one embodiment, a hot swap circuit is disclosed. The hot swap circuit includes a first switch connected to a power input line. The hot swap circuit also includes a first capacitor connected to the first switch that is charged when the first switch is closed. The hot swap circuit further includes a second switch connected to the first switch and the first capacitor. The hot swap circuit additionally includes an input capacitor connected to the second switch and located in parallel with an input line to a power system. When the second switch is closed, the input capacitor is charged.Type: ApplicationFiled: April 27, 2017Publication date: August 10, 2017Inventors: Michael Robert Grant, Yang Li, Jessica Leigh Kiefer, Kan Chiu Seto, Shobhana Punjabi
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Patent number: 9665164Abstract: In one embodiment, a hot swap circuit is disclosed. The hot swap circuit includes a first switch connected to a power input line. The hot swap circuit also includes a first capacitor connected to the first switch that is charged when the first switch is closed. The hot swap circuit further includes a second switch connected to the first switch and the first capacitor. The hot swap circuit additionally includes an input capacitor connected to the second switch and located in parallel with an input line to a power system. When the second switch is closed, the input capacitor is charged.Type: GrantFiled: August 12, 2015Date of Patent: May 30, 2017Assignee: Cisco Technology, Inc.Inventors: Michael Robert Grant, Yang Li, Jessica Leigh Kiefer, Kan Chiu Seto, Shobhana Punjabi
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Publication number: 20170045929Abstract: In one embodiment, a hot swap circuit is disclosed. The hot swap circuit includes a first switch connected to a power input line. The hot swap circuit also includes a first capacitor connected to the first switch that is charged when the first switch is closed. The hot swap circuit further includes a second switch connected to the first switch and the first capacitor. The hot swap circuit additionally includes an input capacitor connected to the second switch and located in parallel with an input line to a power system. When the second switch is closed, the input capacitor is charged.Type: ApplicationFiled: August 12, 2015Publication date: February 16, 2017Inventors: Michael Robert Grant, Yang Li, Jessica Leigh Kiefer, Kan Chiu Seto, Shobhana Punjabi
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Publication number: 20160313783Abstract: In one embodiment, a hot swap circuit is disclosed. The hot swap circuit includes a capacitor in parallel with an input line to a power system. The hot swap circuit also includes a switch in parallel with the input line to the power system and coupled to the capacitor. The hot swap circuit further includes circuitry configured to pre-charge the capacitor to a first voltage while the switch is open. The switch is operable to cause the capacitor to be charged from the first voltage to a second voltage when the switch is closed.Type: ApplicationFiled: April 27, 2015Publication date: October 27, 2016Inventors: Yang Li, Michael Robert Grant, Jessica Leigh Kiefer, Kan Chiu Seto
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Patent number: 9391515Abstract: An apparatus may be provided. The apparatus may comprise a first circuit portion, a second circuit portion, and a third circuit portion. The first circuit portion may comprise a voltage supply having an input voltage level (Vin) and a first switch. The second circuit portion may comprise a plurality of parallel paths. The third circuit portion may comprise a second switch and a third switch. The plurality of parallel paths may supply a portion of the input voltage level when the first switch is open, the second switch is closed, and the third switch is open.Type: GrantFiled: November 18, 2013Date of Patent: July 12, 2016Assignee: Cisco Technology, Inc.Inventors: Yang Li, Haitao Liu, Yingchun Ru, Qiuhua Zhu, Kan Chiu Seto
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Publication number: 20150137788Abstract: An apparatus may be provided. The apparatus may comprise a first circuit portion, a second circuit portion, and a third circuit portion. The first circuit portion may comprise a voltage supply having an input voltage level (Vin) and a first switch. The second circuit portion may comprise a plurality of parallel paths. The third circuit portion may comprise a second switch and a third switch. The plurality of parallel paths may supply a portion of the input voltage level when the first switch is open, the second switch is closed, and the third switch is open.Type: ApplicationFiled: November 18, 2013Publication date: May 21, 2015Applicant: Cisco Technology, Inc.Inventors: Yang Li, Haitao Liu, Yingchun Ru, Qiuhua Zhu, Kan Chiu Seto
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Patent number: 7490251Abstract: Methods and apparatus are disclosed for balancing power across all conductors of an Ethernet connection. Balancing circuitry is disclosed to allow an Ethernet midspan device to receive power from an Ethernet Power Sourcing Equipment (PSE) on the signal pairs of an Ethernet connection. The balancing circuitry is configured to sense the level of the received power, and generate a second power source substantially equal to the received power level. The received power is provided to an Ethernet Powered Device (PD) over the signal pairs of an Ethernet connection, and the generated power to the PD over the unused pairs of the Ethernet connection.Type: GrantFiled: April 13, 2006Date of Patent: February 10, 2009Assignee: Cisco Technology, Inc.Inventors: Meilissa Lum, Kan-Chiu Seto, Roger Karam
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Patent number: 7471014Abstract: A powered device, such as an IP telephone, includes power converter electronics that allows the powered device to couple to multiple power sources and receive a relatively large amount of power (e.g., 15 W or greater) from any single power source or from any combination of the power sources. For example, the powered device can connect to a first power source and a second power source by a cable having four twisted pairs of conductors where a first two-pair set of conductors couples the powered device to the first power source and a second two-pair set of conductors couples the powered device to the second powered device. In use, the converter circuitry can provide power to the load from either the first power source via the first two-pair set of conductors, the second power source via the second two-pair set of conductors, or from both power sources via both the first and second two-pair sets of conductors.Type: GrantFiled: September 1, 2006Date of Patent: December 30, 2008Assignee: Cisco Technology, Inc.Inventors: Meilissa R. Lum, Kan-Chiu Seto, Roger Karam
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Publication number: 20080054720Abstract: A powered device, such as an IP telephone, includes power converter electronics that allows the powered device to couple to multiple power sources and receive a relatively large amount of power (e.g., 15 W or greater) from any single power source or from any combination of the power sources. For example, the powered device can connect to a first power source and a second power source by a cable having four twisted pairs of conductors where a first two-pair set of conductors couples the powered device to the first power source and a second two-pair set of conductors couples the powered device to the second powered device. In use, the converter circuitry can provide power to the load from either the first power source via the first two-pair set of conductors, the second power source via the second two-pair set of conductors, or from both power sources via both the first and second two-pair sets of conductors.Type: ApplicationFiled: September 1, 2006Publication date: March 6, 2008Applicant: Cisco Technology, Inc.Inventors: Meilissa R. Lum, Kan-Chiu Seto, Roger Karam
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Publication number: 20070263675Abstract: Methods and apparatus are disclosed for balancing power across all conductors of an Ethernet connection. Balancing circuitry is disclosed to allow an Ethernet midspan device to receive power from an Ethernet Power Sourcing Equipment (PSE) on the signal pairs of an Ethernet connection. The balancing circuitry is configured to sense the level of the received power, and generate a second power source substantially equal to the received power level. The received power is provided to an Ethernet Powered Device (PD) over the signal pairs of an Ethernet connection, and the generated power to the PD over the unused pairs of the Ethernet connection.Type: ApplicationFiled: April 13, 2006Publication date: November 15, 2007Applicant: Cisco Technology, Inc.Inventors: Meilissa Lum, Kan-Chiu Seto, Roger Karam
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Patent number: 6774612Abstract: An apparatus and method for significantly reducing the initial set-point error and voltage margining accuracy of a DC/DC converter. The initial set-point error is reduced by utilizing the remote sense lines of a DC/DC converter to sense the voltage from the DC/DC converter that is actually applied to the load. A power supply controller having inputs coupled to the remote sense lines compares the sensed voltage to a precision voltage reference and provides an output voltage to the TRIM input of the DC/DC converter. The apparatus and method may be implemented in a voltage supply margining test set-up to test the functionality of an electronic device while the DC/DC converter supplies a voltage to the device that is at either the upper or lower margin of an acceptable supply voltage range of the device.Type: GrantFiled: October 18, 2002Date of Patent: August 10, 2004Assignee: Cisco Technology, Inc.Inventors: Robert Ballenger, Kan Chiu Seto
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Patent number: 6020743Abstract: A technique for detecting failed batteries while the battery is attached to one or more electronic devices and is receiving a float charge is disclosed. The float voltage minimizes the normal voltage differences between battery cells. The technique employs a ratio comparative analysis of cell voltages of a battery provided across the terminals of the battery. Application of the ratio comparative analysis in assessing the condition of a battery assumes an equal voltage drop across each battery cell such that the cells are modeled as a series of resisters with respect to the float voltage. Such equal voltage drop enables a comparative ratio analysis of the voltage across each of the two portions of the battery's cell stack to the voltage across the entire battery. The comparative ratio analysis determines a voltage threshold that identifies whether a battery has a shorted or open cell.Type: GrantFiled: October 21, 1997Date of Patent: February 1, 2000Assignee: Compaq Computer CorporationInventors: Larry D. Reeves, Kan-Chiu Seto, Dung A. Tran
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Patent number: 4864283Abstract: A temperature alarm includes a thermostat for actuating an audible alarm, a control panel-mounted LED and a circuit board-mounted LED. The audible alarm, once actuated by the thermostat, can be temporarily disabled by the user by actuating a disable timer connected to the audible alarm. After a period of time the timer times out to return control of the audible alarm to the thermostat. The panel LED is illuminated continuously while the chosen temperature value is exceeded. The circuit board LED is mounted to a circuit board within the equipment housing. Once illuminated by the thermostat, the circuit board LED remains actuated regardless of the temperature to provide an indication to a service technician that the chosen temperature was exceeded since the last servicing. The circuit board-LED, coupled to a latching relay also mounted to the circuit board, is extinguished by manually resetting the latching relay.Type: GrantFiled: January 23, 1989Date of Patent: September 5, 1989Assignee: Tandem Computers, IncorporatedInventor: Kan-Chiu Seto
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Patent number: 4769595Abstract: A pulse length indicator, for signaling when the length of a pulse from a cyclic signal source has exceeded a chosen duration, has a ramp signal generator, coupled to the cyclic signal source, which produces a ramp signal. The level of the ramp signal is dependent upon the duration of either of the high and low levels of the cyclic signal. The ramp signal is fed to a level sensitive switch which couples an indicator, typically an LED, to a power source. When the level of the ramp signal is sufficiently long or short, the switch closes to actuate the indicator. The ramp signal generator can be a simple R-C circuit with the signal source being AC or DC coupled to the switch.Type: GrantFiled: September 26, 1986Date of Patent: September 6, 1988Assignee: Tandem Computers, Inc.Inventor: Kan-Chiu Seto