Patents by Inventor Kan-Hsueh Tsai

Kan-Hsueh Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Structure of GaN-based transistor and method of fabricating the same
    Patent number: 10170580
    Abstract: A GaN-based transistor device comprises a substrate; a buffer layer disposed on the substrate; a channel layer disposed on the buffer layer; a barrier layer disposed on a part of the channel layer; a passivation layer disposed on the barrier layer; wherein the barrier layer and the passivation layer comprise a first side wall and a second side wall; a barrier metal layer disposed on the passivation layer has a first opening that exposes a part of the passivation layer, and the passivation layer has a second opening located in the first opening; a gate electrode disposed on the exposed part of the barrier layer, a source electrode disposed on the channel layer covers the first side wall and a part of the barrier metal layer, and a drain electrode disposed on the channel layer covers the second side wall and another part of the barrier metal layer.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: January 1, 2019
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kan-Hsueh Tsai, Heng-Yuan Lee
  • STRUCTURE OF GAN-BASED TRANSISTOR AND METHOD OF FABRICATING THE SAME
    Publication number: 20180342598
    Abstract: A GaN-based transistor device comprises a substrate; a buffer layer disposed on the substrate; a channel layer disposed on the buffer layer; a barrier layer disposed on a part of the channel layer; a passivation layer disposed on the barrier layer; wherein the barrier layer and the passivation layer comprise a first side wall and a second side wall; a barrier metal layer disposed on the passivation layer has a first opening that exposes a part of the passivation layer, and the passivation layer has a second opening located in the first opening; a gate electrode disposed on the exposed part of the barrier layer, a source electrode disposed on the channel layer covers the first side wall and a part of the barrier metal layer, and a drain electrode disposed on the channel layer covers the second side wall and another part of the barrier metal layer.
    Type: Application
    Filed: October 23, 2017
    Publication date: November 29, 2018
    Inventors: Kan-Hsueh Tsai, Heng-Yuan Lee
  • Structure of epitaxial wafer and method of fabricating the same
    Patent number: 10074533
    Abstract: This disclosure provides an epitaxial wafer, which includes: a silicon wafer having a central area and an extremity area enclosing the central area, the extremity area having a stepped profile; and an nitride epitaxial layer formed on the silicon wafer; wherein, the stepped profile has a width between 10 and 1500 ?m and a height between 1 and 500 ?m.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: September 11, 2018
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Po-Chun Yeh, Kan-Hsueh Tsai, Chuan-Wei Tsou, Heng-Yuan Lee, Hsueh-Hsing Liu, Han-Chieh Ho, Yi-Keng Fu