Patents by Inventor Kanak Chandra DAS

Kanak Chandra DAS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Low power bi-directional architecture for current output digital to analog conversion
    Patent number: 11876530
    Abstract: An example apparatus includes: a voltage-to-current circuit including a first input terminal, a first output terminal and a second output terminal, a subtraction circuit including a second input terminal and a third output terminal, the second input terminal coupled to the second output terminal, a first driver circuit including a third input terminal and a fourth output terminal, the third input terminal coupled to the third output terminal, and a second driver circuit including a fourth input terminal and a fifth output terminal, the fourth input terminal coupled to the first output terminal, the fifth output coupled to the fourth output terminal.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: January 16, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Atul Kumar Agrawal, Kanak Chandra Das
  • LOW POWER BI-DIRECTIONAL ARCHITECTURE FOR CURRENT OUTPUT DIGITAL TO ANALOG CONVERSION
    Publication number: 20230100835
    Abstract: An example apparatus includes: a voltage-to-current circuit including a first input terminal, a first output terminal and a second output terminal, a subtraction circuit including a second input terminal and a third output terminal, the second input terminal coupled to the second output terminal, a first driver circuit including a third input terminal and a fourth output terminal, the third input terminal coupled to the third output terminal, and a second driver circuit including a fourth input terminal and a fifth output terminal, the fourth input terminal coupled to the first output terminal, the fifth output coupled to the fourth output terminal.
    Type: Application
    Filed: September 30, 2021
    Publication date: March 30, 2023
    Inventors: Atul Kumar Agrawal, Kanak Chandra Das
  • POWER-ON RESET CIRCUIT
    Publication number: 20210194479
    Abstract: An integrated circuit includes a power-on reset (POR) circuit and a digital logic circuit. The POR has first and second control outputs. The POR circuit is configured to generate a first control signal on the first control output responsive to a supply voltage on the supply voltage node exceeding a first threshold voltage and is configured to generate a second control signal on the second control output responsive to the supply voltage exceeding a second threshold voltage. The digital logic circuit has a first control input coupled to the first control output of the POR circuit and has a second control input coupled to the second control output of the POR circuit. The digital logic circuit is configured to initiate a first read transaction responsive to assertion of the first control signal and to initiate a second read transaction responsive to assertion of the second control signal.
    Type: Application
    Filed: March 8, 2021
    Publication date: June 24, 2021
    Inventors: Rishubh KHURANA, Tanmay NEEMA, Kanak Chandra DAS, Atul Kumar AGRAWAL
  • Power-on reset circuit
    Patent number: 10972092
    Abstract: An integrated circuit includes a power-on reset (POR) circuit and a digital logic circuit. The POR has first and second control outputs. The POR circuit is configured to generate a first control signal on the first control output responsive to a supply voltage on the supply voltage node exceeding a first threshold voltage and is configured to generate a second control signal on the second control output responsive to the supply voltage exceeding a second threshold voltage. The digital logic circuit has a first control input coupled to the first control output of the POR circuit and has a second control input coupled to the second control output of the POR circuit. The digital logic circuit is configured to initiate a first read transaction responsive to assertion of the first control signal and to initiate a second read transaction responsive to assertion of the second control signal.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: April 6, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rishubh Khurana, Tanmay Neema, Kanak Chandra Das, Atul Kumar Agrawal
  • POWER-ON RESET CIRCUIT
    Publication number: 20210036701
    Abstract: An integrated circuit includes a power-on reset (POR) circuit and a digital logic circuit. The POR has first and second control outputs. The POR circuit is configured to generate a first control signal on the first control output responsive to a supply voltage on the supply voltage node exceeding a first threshold voltage and is configured to generate a second control signal on the second control output responsive to the supply voltage exceeding a second threshold voltage. The digital logic circuit has a first control input coupled to the first control output of the POR circuit and has a second control input coupled to the second control output of the POR circuit. The digital logic circuit is configured to initiate a first read transaction responsive to assertion of the first control signal and to initiate a second read transaction responsive to assertion of the second control signal.
    Type: Application
    Filed: May 21, 2020
    Publication date: February 4, 2021
    Inventors: Rishubh KHURANA, Tanmay NEEMA, Kanak Chandra DAS, Atul Kumar AGRAWAL