Patents by Inventor Kaname MITSUZUKA

Kaname MITSUZUKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260156920
    Abstract: A semiconductor device including a transistor portion and a diode portion has a cathode region of the first conductivity type which is provided on a back surface of the semiconductor substrate and has a higher doping concentration than that of the drift region, and a collector region of the second conductivity type which is provided on the back surface of the semiconductor substrate and has a higher doping concentration than that of the base region, and includes a mixed portion where a transistor region below which the collector region is provided and a diode region below which the cathode region is provided are alternately provided in the trench extension direction.
    Type: Application
    Filed: January 23, 2026
    Publication date: June 4, 2026
    Inventors: Yuuki ODA, Atsushi ONOGAWA, Tohru SHIRAKAWA, Kaname MITSUZUKA
  • Patent number: 12543357
    Abstract: Provided is a semiconductor device including: a semiconductor substrate having an upper surface and a lower surface and provided with a drift region of a first conductivity type; and a buffer region provided between the drift region and the lower surface and having a higher doping concentration than the drift region. The buffer region has M doping concentration peaks provided at different positions in a depth direction of the semiconductor substrate, and a charge carrier coefficient ? represented by Expression (1) is 2000 or more and 50000 or less in at least one integer i (i is an integer of 1 or more and M?1 or less).
    Type: Grant
    Filed: February 22, 2023
    Date of Patent: February 3, 2026
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Yuki Karamoto, Kaname Mitsuzuka
  • Patent number: 12439622
    Abstract: Provided is a semiconductor device including a gate trench portion and a first trench portion adjacent to the gate trench portion. The device may include a first conductivity type drift region provided in a semiconductor substrate, a second conductivity type base region provided above the drift region, a first conductivity type emitter region provided above the base region and having a doping concentration higher than that of the drift region, and a second conductivity type contact region provided above the base region and having a doping concentration higher than that of the base region. The contact region includes a first contact portion provided on a front surface of the substrate, and a second contact portion having a doping concentration different from that of the first contact portion and provided alternately with the first contact portion in a trench extending direction on a side wall of the first trench portion.
    Type: Grant
    Filed: December 20, 2022
    Date of Patent: October 7, 2025
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kaname Mitsuzuka, Tohru Shirakawa
  • Patent number: 12431448
    Abstract: A semiconductor device including a semiconductor substrate, the semiconductor device including: a sensing portion that is provided on the semiconductor substrate and that is configured to detect predetermined physical information; a sensing pad portion that is provided above an upper surface of the semiconductor substrate and that is connected to the sensing portion; a gate runner which is provided above the upper surface of the semiconductor substrate and to which a gate potential is applied; and one or more separated conductive portions in which each separated conductive portion is provided between the sensing pad portion and the semiconductor substrate and that is separated from the gate runner.
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: September 30, 2025
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Tohru Shirakawa, Yasunori Agata, Naoki Saegusa, Kaname Mitsuzuka
  • Patent number: 12426352
    Abstract: Provided is a semiconductor device including a semiconductor substrate; a transistor portion provided in the semiconductor substrate; a current sensing portion for detecting current flowing through the transistor portion; an emitter electrode set to an emitter potential of the transistor portion; a sense electrode electrically connected to the current sensing portion; and a Zener diode electrically connected between the emitter electrode and the sense electrode. Provided is a semiconductor device fabricating method including providing a transistor portion in a semiconductor substrate; providing a current sensing portion for detecting current flowing through the transistor portion; providing an emitter electrode set to an emitter potential of the transistor portion; providing a sense electrode electrically connected to the current sensing portion; and providing a Zener diode electrically connected between the emitter electrode and the sense electrode.
    Type: Grant
    Filed: November 13, 2023
    Date of Patent: September 23, 2025
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kaname Mitsuzuka, Yuichi Onozawa
  • Publication number: 20250261388
    Abstract: A semiconductor device, including: a semiconductor substrate having an active region and a termination region; a first semiconductor region provided in the semiconductor substrate; a second semiconductor region provided in the active region, between a front surface of the semiconductor substrate and the first semiconductor region; a vertical device structure provided in the active region; an insulating layer that covers the front surface of the semiconductor substrate in the termination region; a voltage withstanding structure provided in the termination region to surround the active region, and including a third semiconductor region; a channel stopper electrode provided on the insulating layer, closer to the semiconductor substrate than is the voltage withstanding structure; and a fourth semiconductor region provided between the front surface of the semiconductor substrate and the first semiconductor region, apart from the third semiconductor region and the contact hole on two sides of the fourth semiconduct
    Type: Application
    Filed: April 29, 2025
    Publication date: August 14, 2025
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Yuki KARAMOTO, Tohru SHIRAKAWA, Kaname MITSUZUKA
  • Publication number: 20250218780
    Abstract: A method includes: forming a mask above the semiconductor substrate such that a covering density for a predetermined first region of the semiconductor substrate by the mask is higher than a covering density for a predetermined second region of the semiconductor substrate by the mask; performing ion implantation of a dopant in each of the first region and the second region for forming a second conductivity type region on a front surface of the semiconductor substrate; diffusing the implanted dopant into the semiconductor substrate, where the mask includes a covering portion and an uncovering portion, a width of the covering portion is equal to or greater than 0.25 times and equal to or smaller than 0.8 times a diffusion depth of the dopant, a width of the uncovering portion is equal to or greater than one-third and equal to or smaller than once the width of the covering portion.
    Type: Application
    Filed: October 28, 2024
    Publication date: July 3, 2025
    Inventor: Kaname MITSUZUKA
  • Patent number: 12342607
    Abstract: A semiconductor device includes a transistor portion which includes a plurality of gate structure portions, and a diode portion which includes a cathode region in a lower surface of a semiconductor substrate. Each of the gate structure portions includes a gate trench portion, an emitter region of a first conductive type which is provided between an upper surface of the semiconductor substrate and a drift region to abut on the gate trench portion, and a base region of a second conductive type which is provided between the emitter region and the drift region to abut on the gate trench portion. A first threshold of the gate structure portion with a shortest distance to the cathode region in a top view is lower than a second threshold of the gate structure portion with a longest distance to the cathode region by 0.1 V or more and 1 V or less.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: June 24, 2025
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kaname Mitsuzuka, Tohru Shirakawa, Toru Ajiki, Yuichi Onozawa
  • Publication number: 20250126898
    Abstract: On a single semiconductor substrate, a main semiconductor device is provided in an active-region operating region and a current sensing portion for detecting overcurrent flowing through the main semiconductor device is provided in a sensing region. The main semiconductor device and the current sensing portion are vertical IGBTs with a trench gate structure. All cells of the main semiconductor device have a CS region. Some of the cells of the current sensing portion have the same structure as the structure of the cells of the main semiconductor device while some of the cells have a structure that is free of CS regions but otherwise the same as the structure of the cells of the main semiconductor device. An average carrier concentration of the CS regions per unit area of the sensing region is less than that of the CS regions per unit area of the active-region operating region.
    Type: Application
    Filed: August 28, 2024
    Publication date: April 17, 2025
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Kaname MITSUZUKA
  • Publication number: 20240332373
    Abstract: A semiconductor device includes a semiconductor substrate with an upper surface and a lower surface, including an n-type semiconductor region having a hydrogen containing region. A carrier concentration distribution representing a carrier concentration by a semi-logarithmic graph in the depth direction of the n-type semiconductor region includes a flat portion containing a first flat part and a second flat part located closer to the lower surface of the semiconductor substrate than the first plat part, and a slope located between the first flat part and the second flat part.
    Type: Application
    Filed: June 13, 2024
    Publication date: October 3, 2024
    Inventors: Yoshiharu KATO, Toru AJIKI, Tohru SHIRAKAWA, Misaki TAKAHASHI, Kaname MITSUZUKA, Takashi YOSHIMURA, Yuichi ONOZAWA, Hiroshi TAKISHITA, Soichi YOSHIDA
  • Publication number: 20240274663
    Abstract: Provided is a semiconductor device including: a semiconductor substrate provided with a drift region of a first conductivity type; an emitter region of the first conductivity type provided in contact with an upper surface of the semiconductor substrate and having a higher doping concentration than the drift region; a base region of a second conductivity type provided in contact with the emitter region; a collector region of the second conductivity type provided between the drift region and a lower surface of the semiconductor substrate; and a floating region of the first conductivity type provided in contact with an upper surface of the collector region and having a higher doping concentration than the collector region, wherein the collector region has a first region which is not covered with the floating region and a second region which is covered with the floating region.
    Type: Application
    Filed: April 21, 2024
    Publication date: August 15, 2024
    Inventors: Tohru SHIRAKAWA, Kaname MITSUZUKA
  • Publication number: 20240266389
    Abstract: Provided is a semiconductor device including: a semiconductor substrate having an upper surface and a lower surface and having a drift region of a first conductivity type; and a buffer region of the first conductivity type provided between the drift region and the lower surface of the semiconductor substrate and having a higher doping concentration than the drift region, wherein the buffer region has: a first recombination center density peak; and a second recombination center density peak arranged on a side of the upper surface of the semiconductor substrate relative to the first recombination center density peak, and an integrated value of the second recombination center density peak in a depth direction is greater than an integrated value of the first recombination center density peak in the depth direction.
    Type: Application
    Filed: March 21, 2024
    Publication date: August 8, 2024
    Inventors: Yoshiharu KATO, Kaname MITSUZUKA, Tohru SHIRAKAWA, Yuuki ODA
  • Patent number: 12015058
    Abstract: A device includes a substrate with upper/lower surfaces, including hydrogen containing region having hydrogen chemical concentration peaks in a depth direction. A carrier concentration distribution of the hydrogen containing region includes a first carrier concentration peak, a second carrier concentration peak closest to the first carrier concentration peak, a third carrier concentration peak arranged closer to the upper surface than the second carrier concentration peak, a first inter peak region arranged between the first and second carrier concentration peaks, a second inter peak region arranged between the second and third carrier concentration peaks, and an inter-peaks concentration peak arranged in the second inter peak region such that the concentration peak does not overlap the hydrogen chemical concentration peaks in the second and third carrier concentration peaks. A local minimum value of a carrier concentration in the first inter peak region is smaller than that of the second inter peak region.
    Type: Grant
    Filed: June 13, 2023
    Date of Patent: June 18, 2024
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Yoshiharu Kato, Toru Ajiki, Tohru Shirakawa, Misaki Takahashi, Kaname Mitsuzuka, Takashi Yoshimura, Yuichi Onozawa, Hiroshi Takishita, Soichi Yoshida
  • Publication number: 20240162285
    Abstract: Provided is a semiconductor device including an active portion arranged below an upper surface electrode and an edge termination structure portion arranged between the upper surface electrode and an end side of a semiconductor substrate in a top view, in which the active portion includes an active collector region, the edge termination structure portion includes an edge collector region, and an integrated value of a carrier concentration of the active collector region in a depth direction is larger than an integrated value of a carrier concentration of the edge collector region in the depth direction. An upper end position of the active collector region in the depth direction and an upper end position of the edge collector region in the depth direction may differ.
    Type: Application
    Filed: September 21, 2023
    Publication date: May 16, 2024
    Inventors: Tohru SHIRAKAWA, Yasunori AGATA, Kaname MITSUZUKA
  • Publication number: 20240128349
    Abstract: Provided is a semiconductor device including: a drift region of a first conductivity type provided in a semiconductor substrate; a collector region of a second conductivity type provided on a back surface of the semiconductor substrate; a cathode region of the first conductivity type provided on the back surface of the semiconductor substrate and having a higher doping concentration than the drift region; a plurality of trench portions provided on a front surface of the semiconductor substrate; and a lifetime control portion provided in the semiconductor substrate and containing a lifetime killer, in which the lifetime control portion includes: a main region provided in a diode portion; and a decay region provided to extend from the main region in a direction parallel to the front surface of the semiconductor substrate and having a lifetime killer concentration that has decayed more than a lifetime killer concentration of the main region.
    Type: Application
    Filed: August 22, 2023
    Publication date: April 18, 2024
    Inventors: Atsushi ONOGAWA, Kaname MITSUZUKA, Yuuki ODA, Tohru SHIRAKAWA
  • Publication number: 20240096965
    Abstract: Provided is a semiconductor device comprising a gate trench portion and a first trench portion adjacent to the gate trench portion, the semiconductor device comprising: a drift region of a first conductivity type; a base region of a second conductivity type; an emitter region of the first conductivity type that is provided above the base region and has a higher doping concentration than that of the drift region; and a contact region of the second conductivity type that is provided above the base region and has a higher doping concentration than that of the base region. In a mesa portion between the gate trench portion and the first trench portion, the contact region may have a first contact portion and a second contact portion that are provided to extend from the first trench portion to below a lower end of the emitter region.
    Type: Application
    Filed: November 23, 2023
    Publication date: March 21, 2024
    Inventors: Kaname MITSUZUKA, Yuki KARAMOTO
  • Publication number: 20240088221
    Abstract: A semiconductor device includes: a gate trench portion provided in a semiconductor substrate; a first trench portion provided in the semiconductor substrate and adjacent to the gate trench portion; an emitter region of a first conductivity type provided to be in contact with the gate trench portion in a mesa portion between the gate trench portion and the first trench portion; a contact region of a second conductivity type provided to be in contact with the first trench portion in the mesa portion; a metal layer provided above the semiconductor substrate; and a resistance portion of the first conductivity type provided to be in contact with the metal layer and the emitter region and having a lower doping concentration than that of the emitter region.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventor: Kaname MITSUZUKA
  • Publication number: 20240079406
    Abstract: Provided is a semiconductor device including a semiconductor substrate; a transistor portion provided in the semiconductor substrate; a current sensing portion for detecting current flowing through the transistor portion; an emitter electrode set to an emitter potential of the transistor portion; a sense electrode electrically connected to the current sensing portion; and a Zener diode electrically connected between the emitter electrode and the sense electrode. Provided is a semiconductor device fabricating method including providing a transistor portion in a semiconductor substrate; providing a current sensing portion for detecting current flowing through the transistor portion; providing an emitter electrode set to an emitter potential of the transistor portion; providing a sense electrode electrically connected to the current sensing portion; and providing a Zener diode electrically connected between the emitter electrode and the sense electrode.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Inventors: Kaname MITSUZUKA, Yuichi ONOZAWA
  • Publication number: 20240055483
    Abstract: Provided is a semiconductor device including a buffer region of a first conductivity type, which is provided between a lower surface of a semiconductor substrate and a drift region, has three or more doping concentration peaks in a depth direction of the semiconductor substrate, and has a higher concentration than the drift region, in which the three or more doping concentration peaks include a deepest peak farthest from the lower surface of the semiconductor substrate and a second peak second closest to the lower surface of the semiconductor substrate, and a peak width of the second peak is 2 times or more of a peak width of the deepest peak in the depth direction.
    Type: Application
    Filed: July 21, 2023
    Publication date: February 15, 2024
    Inventors: Yuki KARAMOTO, Kaname MITSUZUKA
  • Patent number: 11830871
    Abstract: Provided is a semiconductor device including a semiconductor substrate; a transistor portion provided in the semiconductor substrate; a current sensing portion for detecting current flowing through the transistor portion; an emitter electrode set to an emitter potential of the transistor portion; a sense electrode electrically connected to the current sensing portion; and a Zener diode electrically connected between the emitter electrode and the sense electrode. Provided is a semiconductor device fabricating method including providing a transistor portion in a semiconductor substrate; providing a current sensing portion for detecting current flowing through the transistor portion; providing an emitter electrode set to an emitter potential of the transistor portion; providing a sense electrode electrically connected to the current sensing portion; and providing a Zener diode electrically connected between the emitter electrode and the sense electrode.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: November 28, 2023
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Kaname Mitsuzuka, Yuichi Onozawa