Abstract: A single-hop relay cellular system 300 and a multi-hop relay cellular system 400 including frequency links (102A-F), a backhaul link 104, an access link 106, and a relay base station 108 are provided. The relay base station 108 is configured to interchange a frequency of operation between a first frequency carrier 114A and a second frequency carrier 114B for uplink and downlink transmission. Each node in the single-hop relay cellular system 300 and the multi-hop relay cellular system 400 is enabled to transmit and receive on frequency carriers through static or dynamic control.

Abstract: A system for securing wireless communication between a transmitter and a receiver through a physical layer control and a data channel is disclosed. The transmitter includes a pseudo random sequence generator module and an encryption module. The pseudo random sequence generator module receives a protocol input, and an additional input. The pseudo random sequence generator module initializes an initial state with the protocol input and the additional input to obtain a pseudo random sequence code. The encryption module receives a ciphering key and encrypts the pseudo random sequence code with the ciphering to obtain an encrypted secure scrambling code to secure the system through the physical layer control and the data channel.

Abstract: A method to convert lock-free algorithm to wait-free using a hardware accelerator includes (i) executing a plurality of software threads by a plurality of processing units associated, the plurality of software threads is associated with at least one operation, (ii) generating at least one of a read request or a write request at the hardware accelerator based on the execution, (iii) generating at least one operation includes PARAM and read request or the write request at the hardware accelerator, (iv) checking, an operation specific condition of at least one software thread of the plurality of software threads, and (v) updating, at least one read value or write value and at least one state variable upon the operation specific condition being an operation success. The operation specific condition includes an operation success or an operation failure based on the PARAM, the read request, or the write request.

Abstract: A single-hop relay cellular system 300 and a multi-hop relay cellular system 400 including frequency links (102A-F), a backhaul link 104, an access link 106, and a relay base station 108 are provided. The relay base station 108 is configured to interchange a frequency of operation between a first frequency carrier 114A and a second frequency carrier 114B for uplink and downlink transmission. Each node in the single-hop relay cellular system 300 and the multi-hop relay cellular system 400 is enabled to transmit and receive on frequency carriers through static or dynamic control.

Abstract: A system for securing wireless communication between a transmitter and a receiver through a physical layer control and a data channel is disclosed. The transmitter includes a pseudo random sequence generator module and an encryption module. The pseudo random sequence generator module receives a protocol input, and an additional input. The pseudo random sequence generator module initializes an initial state with the protocol input and the additional input to obtain a pseudo random sequence code. The encryption module receives a ciphering key and encrypts the pseudo random sequence code with the ciphering to obtain an encrypted secure scrambling code to secure the system through the physical layer control and the data channel.

Abstract: A method to convert lock-free algorithm to wait-free using a hardware accelerator includes (i) executing a plurality of software threads by a plurality of processing units associated, the plurality of software threads is associated with at least one operation, (ii) generating at least one of a read request or a write request at the hardware accelerator based on the execution, (iii) generating at least one operation includes PARAM and read request or the write request at the hardware accelerator, (iv) checking, an operation specific condition of at least one software thread of the plurality of software threads, and (v) updating, at least one read value or write value and at least one state variable upon the operation specific condition being an operation success. The operation specific condition includes an operation success or an operation failure based on the PARAM, the read request, or the write request.