Patents by Inventor Kandasamy Sundaram

Kandasamy Sundaram has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200291309
    Abstract: A process for steam cracking a whole crude including a volatilization step performed to maintain a relatively large hydrocarbon droplet size. The process may include contacting a whole crude with steam to volatilize a portion of the hydrocarbons, wherein the contacting of the hydrocarbon feedstock and steam is conducted at an initial relative velocity of less than 30 m/s, for example. The resulting vapor phase, including volatilized hydrocarbons and steam may then be separated from a liquid phase comprising unvaporized hydrocarbons. The hydrocarbons in the vapor phase may then be forwarded to a steam pyrolysis reactor for steam cracking of the hydrocarbons in the vapor phase.
    Type: Application
    Filed: March 16, 2020
    Publication date: September 17, 2020
    Applicants: LUMMUS TECHNOLOGY LLC, Saudi Aramco Technologies Company
    Inventors: Dennis Maloney, Kandasamy Sundaram, Raghu Narayan, Abdul Rahman Zafer Akhras
  • Patent number: 7262608
    Abstract: A method for monitoring the depth of at least one via (11) in a wafer including the steps of arranging the via (11) as a capacitive plate (21), providing a corresponding capacitive plate (23), applying an electrical potential difference to the via (11) and the corresponding capacitive plate (23), measuring the resultant capacitance between the via (11) and a corresponding capacitive plate (23) and determining the depth of the at least one via (11) by the capacitance.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: August 28, 2007
    Assignee: Silterra Malaysia Sdn. Bhd.
    Inventors: Chin B. Cheah, Kandasamy Sundaram, Rajagopal Ramakrishnan, Arjun Kumar
  • Publication number: 20060132148
    Abstract: A method for monitoring the depth of at least one via (11) in a wafer comprising the steps of arranging the via (11) as a capacitive plate (21), providing a corresponding capacitive plate (23), applying an electrical potential difference to the via (11) and the corresponding capacitive plate (23), measuring the resultant capacitance between the via (11) and a corresponding capacitive plate (23) and determining the depth of the at least one via (11) by the capacitance.
    Type: Application
    Filed: October 4, 2005
    Publication date: June 22, 2006
    Inventors: Chin Cheah, Kandasamy Sundaram, Rajagopal Ramakrishnan, Arjun Kumar