Patents by Inventor Kaneo Mori

Kaneo Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10094709
    Abstract: A light-emitting element, in which a light whose emission angle distribution is one of Lambert's emission law or uniform Isotropic emission, is extracted from a light extraction opening window, and an in-plane distribution of a light intensity on a light extraction surface of the light extraction opening window is uniform, and which can be used as a reference light source when measuring an absolute light quantity of a weak light emitted from a luminous body which is a measurement object.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: October 9, 2018
    Assignees: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY, ATTO CORPORATION
    Inventors: Hidefumi Akiyama, Masahiro Yoshita, Yoshihiro Ohmiya, Hidehiro Kubota, Kaneo Mori, Masahiro Shimogawara
  • Publication number: 20170191872
    Abstract: A light-emitting element, in which a light whose emission angle distribution is one of Lambert's emission law or uniform Isotropic emission, is extracted from a light extraction opening window, and an in-plane distribution of a light intensity on a light extraction surface of the light extraction opening window is uniform, and which can be used as a reference light source when measuring an absolute light quantity of a weak light emitted from a luminous body which is a measurement object.
    Type: Application
    Filed: December 22, 2014
    Publication date: July 6, 2017
    Inventors: Hidefumi AKIYAMA, Masahiro YOSHITA, Yoshihiro OHMIYA, Hidehiro KUBOTA, Kaneo MORI, Masahiro SHIMOGAWARA
  • Patent number: 5994995
    Abstract: A laminated chip varistor has a varistor element including at least one varistor layer and at least two inner electrodes which are laminated alternatively, and outer most layers comprising the same material as the varistor layer; and terminal electrodes electrically connected to the inner electrodes each formed at each of the both edge portions of the varistor element; wherein a surface roughness (R) of the varistor element is in the range of 0.60 to 0.90 .mu.m.
    Type: Grant
    Filed: February 2, 1998
    Date of Patent: November 30, 1999
    Assignee: TDK Corporation
    Inventors: Tadashi Ogasawara, Kaneo Mori, Masaaki Taniguchi, Masahiko Konno, Dai Matsuoka