Patents by Inventor Kang Dae Kim
Kang Dae Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240135744Abstract: A display device comprises a display panel comprising an image display area and a non-display area, display pixels comprising light-emitting elements in the image display area and pixel driving units connected to the light-emitting elements, light-sensing pixels comprising photo-detecting units in a fingerprint sensing area in the image display area, and sense driving units connected to the photo-detecting units, a light-sensing reset driver configured to supply reset signals to the sense driving units of the light-sensing pixels for at least each horizontal line among the light-sensing pixels in response to a line select signal from a display driving circuit; and a fingerprint scan driver configured to sequentially supply a fingerprint scan signal to the sense driving units of the light-sensing pixels in response to a fingerprint scan control signal from the display driving circuit.Type: ApplicationFiled: September 27, 2023Publication date: April 25, 2024Inventors: Hyun Dae LEE, Il Nam KIM, Hyoung Wook JANG, Kang Bin JO, Go Eun CHA, Hee Chul HWANG
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Patent number: 11947463Abstract: Disclosed herein is an apparatus for managing disaggregated memory, which is located in a virtual machine in a physical node. The apparatus is configured to select, depending on the proportion of valid pages, direct transfer between remote memory units or indirect transfer via local memory for each of the memory pages of the source remote memory to be migrated, among at least one remote memory unit used by the virtual machine, to transfer the memory pages of the source remote memory to target remote memory based on the direct transfer or the indirect transfer, and to release the source remote memory.Type: GrantFiled: January 24, 2023Date of Patent: April 2, 2024Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Kwang-Won Koh, Chang-Dae Kim, Kang-Ho Kim
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Patent number: 11929032Abstract: A display device comprises a display panel which comprises scan lines, sensing lines, pixels electrically connected to each of the scan lines, and photo sensors electrically to each of the scan lines and the sensing lines, a scan driver which outputs scan signals to the scan lines according to a scan control signal, a timing controller which outputs the scan control signal to the scan driver, and a readout circuit which receives light sensing signals of the photo sensors from the sensing lines. The timing controller sets a frame frequency of the scan control signal to a first frame frequency in a first mode in which the display panel displays an image. The timing controller sets the frame frequency of the scan control signal to a second frame frequency in a second mode in which the photo sensors sense a fingerprint.Type: GrantFiled: August 15, 2022Date of Patent: March 12, 2024Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Hyun Dae Lee, Il Nam Kim, Seung Hyun Moon, Dong Wook Yang, Kang Bin Jo, Go Eun Cha
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Patent number: 8344366Abstract: Provided are an organic thin film transistor and a method of forming the same. The method comprises forming a gate electrode on a substrate, forming a gate dielectric, which covers the gate electrode and includes a recess region at an upper portion, on the substrate, forming a source electrode and a drain electrode in the recess region, and forming an organic semiconductor layer between the source electrode and the drain electrode in the recess region.Type: GrantFiled: August 18, 2010Date of Patent: January 1, 2013Assignee: Electronics and Telecommunications Research InstituteInventors: Kang Dae Kim, In-Kyu You, Jae Bon Koo, Yong Suk Yang, Seung Youl Kang
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Patent number: 8278138Abstract: Provided are a resistive memory device and a method of fabricating the same. The resistive memory device comprises an electron channel layer formed by means of a swelling process and an annealing process. Thus, conductive nanoparticles are uniformly dispersed in the electron channel layer to improve reliability of the resistive memory device. According to the method, an electron channel layer is formed by means of a printing process, a swelling process, and an annealing process. Thus, fabrication time is reduced.Type: GrantFiled: October 29, 2010Date of Patent: October 2, 2012Assignee: Electronics and Telecommunications Research InstituteInventors: Yong Suk Yang, In-Kyu You, Jae Bon Koo, Soon Won Jung, Kang Dae Kim, Yong-Young Noh
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Publication number: 20110272661Abstract: Provided are a resistive memory device and a method of fabricating the same. The resistive memory device comprises an electron channel layer formed by means of a swelling process and an annealing process. Thus, conductive nanoparticles are uniformly dispersed in the electron channel layer to improve reliability of the resistive memory device. According to the method, an electron channel layer is formed by means of a printing process, a swelling process, and an annealing process. Thus, fabrication time is reduced.Type: ApplicationFiled: October 29, 2010Publication date: November 10, 2011Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Yong Suk YANG, In-Kyu You, Jae Bon Koo, Soon Won Jung, Kang Dae Kim, Yong-Young Noh
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Publication number: 20110204334Abstract: Provided are an organic thin film transistor and a method of forming the same. The method comprises forming a gate electrode on a substrate, forming a gate dielectric, which covers the gate electrode and includes a recess region at an upper portion, on the substrate, forming a source electrode and a drain electrode in the recess region, and forming an organic semiconductor layer between the source electrode and the drain electrode in the recess region.Type: ApplicationFiled: August 18, 2010Publication date: August 25, 2011Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Kang Dae KIM, In-Kyu You, Jae Bon Koo, Yong Suk Yang, Seung Youl Kang
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Publication number: 20100176379Abstract: The present invention relates to a self-aligned organic thin film transistor (TFT) and a fabrication method thereof. According to the present invention, a gate electrode is formed from a first conductive layer patterned on a substrate, a gate dielectric layer is formed on top of the substrate to cover the gate electrode, and a second conductive layer is then formed on the gate dielectric layer. Subsequently, ultraviolet (UV) backside exposure for irradiating the second conductive layer with UV from a bottom side of the substrate using the gate electrode as a mask, and source/drain electrodes self-aligned with the gate electrode is then formed not to overlap with the gate electrode by developing the second conductive electrode. Thereafter, an organic semiconductor layer is formed between and on the source/drain electrodes. In the present invention, an organic TFT can be fabricated using a reel-to-reel process, and therefore, the fabrication process can be simplified.Type: ApplicationFiled: May 30, 2008Publication date: July 15, 2010Applicant: KOREA INSTITUTE OF MACHINERY & MATERIALSInventors: Kang Dae Kim, Taik Min Lee, Hyeon Cheol Choi, Dong Soo Kim, Byun Oh Choi
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Patent number: 7648852Abstract: The present invention provides an organic thin film transistor (OTFT) being operatable at a low-voltage. The OTFT has a gate dielectric layer of ultra-thin metal oxide or a dual gate dielectric layer of metal oxide and organic dielectric. The metal oxide layer is self-grown to a thickness lower than 10 nm by direct oxidation of a metal gate electrode in O2 plasma process at a temperature lower than 100° C. The gate electrode is deposited with pattern on a plastic or glass substrate. An organic semiconductor layer is deposited on the gate dielectric layer, and source/drain electrodes are formed thereon. In case the dual gate dielectric layer is used, the source/drain electrodes can be disposed under the organic semiconductor layer to realize a bottom contact structure.Type: GrantFiled: April 5, 2007Date of Patent: January 19, 2010Assignee: Dong-A University Research Foundation For Industry-Academy CooperationInventors: Jae Woo Yang, Chung Kun Song, Kang Dae Kim, Gi Seong Ryu, Yong Xian Xu, Myung Won Lee
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Publication number: 20090032107Abstract: The present invention relates to an organic solar cell made of a transparent conductive polymer electrode and a fabricating method thereof. An anode electrode is formed on a substrate, a photoactive layer is formed on the anode electrode, and a cathode electrode is then formed on the photoactive layer. The anode electrode is formed by stacking conductive polymer particles by an electrostatic spray printing method, and a micro pattern is formed on the substrate before forming the anode electrode. The micro pattern is formed by hot embossing, the photoactive layer is formed by gravure printing or spin coating, and the cathode electrode is formed by screen print or evaporation deposition. A series of processes for fabricating an organic solar cell is performed using a roll-to-roll process.Type: ApplicationFiled: August 1, 2008Publication date: February 5, 2009Applicant: KOREA INSTITUTE OF MACHINERY & MATERIALSInventors: DONG SOO KIM, KANG DAE KIM, CHUNG HWAN KIM, BYUNG OH CHOI, HYUN EUI LIM
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Publication number: 20080185677Abstract: The present invention provides an organic thin film transistor (OTFT) being operatable at a low-voltage. The OTFT has a gate dielectric layer of ultra-thin metal oxide or a dual gate dielectric layer of metal oxide and organic dielectric. The metal oxide layer is self-grown to a thickness lower than 10 nm by direct oxidation of a metal gate electrode in O2 plasma process at a temperature lower than 100° C. The gate electrode is deposited with pattern on a plastic or glass substrate. An organic semiconductor layer is deposited on the gate dielectric layer, and source/drain electrodes are formed thereon. In case the dual gate dielectric layer is used, the source/drain electrodes can be disposed under the organic semiconductor layer to realize a bottom contact structure.Type: ApplicationFiled: April 5, 2007Publication date: August 7, 2008Inventors: Jae Woo Yang, Chung Kun Song, Kang Dae Kim, Gi Seong Ryu, Yong Xian Xu, Myung Won Lee