Patents by Inventor Kang Deng

Kang Deng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240076725
    Abstract: The present disclosure provides a microfluidic substrate, a microfluidic chip, a method for preparing the microfluidic chip, and a method for using the microfluidic chip. The microfluidic substrate includes a substrate including a plurality of microcavity regions arranged m an array, each of the plurality of microcavity regions includes a first portion and a second portion that are stacked, and the depth of the first portion is x, and the first portion includes a top opening that is circular in shape and has a diameter D, the relationship between the diameter D of the top opening and the depth x is approximately D=2x+y, where the range of x is from 20 microns to 400 microns, and the range of y is from 5 microns to 30 microns.
    Type: Application
    Filed: May 10, 2022
    Publication date: March 7, 2024
    Inventors: Zhukai Liu, Ruijun Deng, Kang Peng, Ding Ding
  • Patent number: 8890787
    Abstract: A liquid crystal display (LCD) apparatus includes: multiple differential amplifier stages each of which is operable to generate, according to a bias current and an input voltage, an output voltage having a magnitude and a slew rate that correspond respectively to the input voltage and a magnitude of the bias current, and serving as a data voltage of a corresponding pixel unit of an LCD panel; multiple current sources controllable to generate and provide a plurality of the bias currents to the differential amplifier stages, respectively; and a bias voltage generating unit connected electrically to the current sources in a current mirror configuration for generating an input bias current and controlling the current sources to generate the bias currents according to a latch pulse signal. The slew rate of the output voltage corresponds to a logic state of the input bias current.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: November 18, 2014
    Assignee: ILI Technology Corporation
    Inventors: Chih-Kang Cheng, Sung-Yau Yeh, Chih-Kang Deng
  • Patent number: 8749418
    Abstract: An interpolative digital-to-analog (D/A) converter is adapted to convert a N-bit digital signal into an analog signal, where N is a positive integer greater than 1. The interpolative D/A converter includes a router unit that outputs first and second router voltages based on the first and second bits of the digital signal, and an interpolation unit that receives the first and second router voltages from the router unit, and that performs interpolation operation on the first and second router voltages according to the first bit of the digital signal, so as to generate the analog signal having a voltage magnitude ranging from the first router voltage to the second router voltage.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: June 10, 2014
    Assignee: Ili Technology Corporation
    Inventors: Sung-Yau Yeh, Chih-Kang Deng
  • Publication number: 20140043178
    Abstract: An interpolative digital-to-analog (D/A) converter is adapted to convert a N-bit digital signal into an analog signal, where N is a positive integer greater than 1. The interpolative D/A converter includes a router unit that outputs first and second router voltages based on the first and second bits of the digital signal, and an interpolation unit that receives the first and second router voltages from the router unit, and that performs interpolation operation on the first and second router voltages according to the first bit of the digital signal, so as to generate the analog signal having a voltage magnitude ranging from the first router voltage to the second router voltage.
    Type: Application
    Filed: February 12, 2013
    Publication date: February 13, 2014
    Applicant: ILI TECHNOLOGY CORPORATION
    Inventors: Sung-Yau YEH, Chih-Kang DENG
  • Patent number: 8027398
    Abstract: The method contains the following steps. First, in a MCM system with N sub-carriers, the baseband signal blocks Xj, j=1, 2, . . . ,B are supplemented with zeros and processed with LN-point IFFT, respectively, to obtain L-time oversampled time-domain signal blocks xj, j=1,2, . . . ,B. Then, xj undergoes Q Time Domain Circular Shifts or Frequency Domain Circular Shifts to obtain Q signal blocks {tilde over (x)}j(ij), ij=1, ?, Q. Subsequently, a B×B unitary transform is performed against ( x1, {tilde over (x)}2(i2), . . . , {tilde over (x)}B(iB)). After the unitary transform, for each (i2, . . . , iB) a combination having B time-domain signal blocks is obtained as follows: ({tilde over (y)}1(i2, . . . , iB), {tilde over (y)}2(i2, . . . , iB), . . . , {tilde over (y)}B(i2, . . . ,iB))=( x1, {tilde over (x)}2(i2), . . . , {tilde over (x)}B(iB)) cU where U is the B×B unitary matrix, and c is an arbitrary constant (c?0).
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: September 27, 2011
    Assignee: National Taiwan University
    Inventors: Mao-Chao Lin, Shang-Kang Deng, Tien-Hui Chen, Yu-Hung Lo
  • Patent number: 7738223
    Abstract: An active device array substrate includes pixel units, scan lines, data lines, electrostatic discharge (ESD) protection elements, a short ring and an ESD biased generator. Each pixel unit is electrically connected to the corresponding scan line and data line. Each ESD protection element has a first connection terminal, a second connection terminal and a third connection terminal, wherein the first connection terminal is electrically connected to one of the corresponding scan line and data line, the second connection terminal is electrically connected to the short ring, and the third connection terminal is electrically connected to the ESD biased generator. As an ESD stress occurs, the ESD biased generator provides a voltage to the ESD protection elements to turn on them. It causes that the accumulated electrostatic charges are conducted into the lowest potential of the substrate through the short rings, so as to prevent the pixel units from ESD damaging.
    Type: Grant
    Filed: August 21, 2007
    Date of Patent: June 15, 2010
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Ming-Dou Ker, Chih-Kang Deng
  • Patent number: 7632725
    Abstract: An ESD protection device with thicker polysilicon film, an electronic apparatus having the same, and a method for manufacturing the same are provided. The ESD protection device can be a diode or a MOS transistor with a thicker polysilicon film employed in an ESD protection circuit to protect an electronic apparatus. The electronic apparatus includes a substrate having a device area and an ESD protection circuit area. A first polysilicon film of a first thickness is formed on the device area of the substrate, so as to form an electronic device. A second polysilicon film of a second thickness is formed on the ESD protection circuit area, so as to form an ESD protection device. The second thickness, which is preferably about in the range of 100 to 500 nanometers, is thicker than the first thickness.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: December 15, 2009
    Assignee: TPO Displays Corp.
    Inventors: Ming-Dou Ker, Chih-Kang Deng, Tang-Kui Tseng, An Shih, Sheng-Chieh Yang
  • Patent number: 7626647
    Abstract: An electrostatic discharge protection device, an electrostatic discharge protection structure, and a manufacturing process of the device are provided. The electrostatic discharge protection device includes at least four doping regions, wherein two adjacent regions are of different types. The electrostatic discharge protection structure includes an electrostatic discharge bus, a plurality of first electrostatic discharge protection devices connecting to the gates of the display transistors and the electrostatic discharge bus, a plurality of second electrostatic discharge protection devices connecting to the source/drain of the transistors and the electrostatic discharge bus, and a plurality of third electrostatic discharge protection devices connecting to the input/output terminals of the drive circuit of the display and the electrostatic discharge bus.
    Type: Grant
    Filed: August 21, 2007
    Date of Patent: December 1, 2009
    Assignee: AU Optronics Corp.
    Inventors: Ming-Dou Ker, Chih-Kang Deng, Wein-Town Sun
  • Publication number: 20090147870
    Abstract: The method contains the following steps. First, in a MCM system with N sub-carriers, the baseband signal blocks Xj, j=1, 2, . . . ,B are supplemented with zeros and processed with LN-point IFFT, respectively, to obtain L-time oversampled time-domain signal blocks xj, j=1,2, . . . ,B. Then, xj undergoes Q Time Domain Circular Shifts or Frequency Domain Circular Shifts to obtain Q signal blocks {tilde over (x)}j(ij), ij=1,?,Q. Subsequently, a B×B unitary transform is performed against ( x1,{tilde over (x)}2(i2), . . . ,{tilde over (x)}B(iB)). After the unitary transform, for each (i2, . . . ,iB) a combination having B time-domain signal blocks is obtained as follows: ({tilde over (y)}1(i2, . . . ,iB),{tilde over (y)}2(i2, . . . ,iB), . . . ,{tilde over (y)}B(i2, . . . ,iB)=( x1,{tilde over (x)}2(i2), . . . ,{tilde over (x)}B(iB)) cU where U is the B×B unitary matrix, and c is an arbitrary constant (c?0).
    Type: Application
    Filed: June 19, 2008
    Publication date: June 11, 2009
    Inventors: Mao-Chao LIN, Shang-Kang Deng, Tien-Hui Chen, Yu-Hung Lo
  • Publication number: 20080106835
    Abstract: An active device array substrate includes pixel units, scan lines, data lines, electrostatic discharge (ESD) protection elements, a short ring and an ESD biased generator. Each pixel unit is electrically connected to the corresponding scan line and data line. Each ESD protection element has a first connection terminal, a second connection terminal and a third connection terminal, wherein the first connection terminal is electrically connected to one of the corresponding scan line and data line, the second connection terminal is electrically connected to the short ring, and the third connection terminal is electrically connected to the ESD biased generator. As an ESD stress occurs, the ESD biased generator provides a voltage to the ESD protection elements to turn on them. It causes that the accumulated electrostatic charges are conducted into the lowest potential of the substrate through the short rings, so as to prevent the pixel units from ESD damaging.
    Type: Application
    Filed: August 21, 2007
    Publication date: May 8, 2008
    Applicant: CHUNGHWA PICTURE TUBES, LTD.
    Inventors: Ming-Dou Ker, Chih-Kang Deng
  • Publication number: 20080094533
    Abstract: An electrostatic discharge protection device, an electrostatic discharge protection structure, and a manufacturing process of the device are provided. The electrostatic discharge protection device includes at least four doping regions, wherein two adjacent regions are of different types. The electrostatic discharge protection structure includes an electrostatic discharge bus, a plurality of first electrostatic discharge protection devices connecting to the gates of the display transistors and the electrostatic discharge bus, a plurality of second electrostatic discharge protection devices connecting to the source/drain of the transistors and the electrostatic discharge bus, and a plurality of third electrostatic discharge protection devices connecting to the input/output terminals of the drive circuit of the display and the electrostatic discharge bus.
    Type: Application
    Filed: August 21, 2007
    Publication date: April 24, 2008
    Applicant: AU Optronics Corporation
    Inventors: Ming-Dou Ker, Chih-Kang Deng, Wein-Town Sun
  • Publication number: 20060231896
    Abstract: An ESD protection device with thicker polysilicon film, an electronic apparatus having the same, and a method for manufacturing the same are provided. The ESD protection device can be a diode or a MOS transistor with a thicker polysilicon film employed in an ESD protection circuit to protect an electronic apparatus. The electronic apparatus includes a substrate having a device area and an ESD protection circuit area. A first polysilicon film of a first thickness is formed on the device area of the substrate, so as to form an electronic device. A second polysilicon film of a second thickness is formed on the ESD protection circuit area, so as to form an ESD protection device. The second thickness, which is preferably about in the range of 100 to 500 nanometers, is thicker than the first thickness.
    Type: Application
    Filed: June 13, 2006
    Publication date: October 19, 2006
    Inventors: Ming-Dou Ker, Chih-Kang Deng, Tang-Kui Tseng, An Shih, Sheng-Chieh Yang
  • Patent number: 7064418
    Abstract: A method and a structure of a diode are provided. The diode is used in an electrostatic discharge protection circuit using TFT (Thin Film Transistor) fabrication technology. A semiconductor layer is formed on a substrate. A first region of a first carrier concentration is formed in the semiconductor layer. A second region of a second carrier concentration is formed in the semiconductor layer. An insulator is formed on the semiconductor layer. The insulator layer is etched to form at least a contact window. The contact window exposes a portion of an upper surface of the semiconductor layer. A metal layer is formed on the insulator layer. The metal layer fills up the contact window to contact the semiconductor layer.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: June 20, 2006
    Assignee: Toppoly Optoelectronics Corp.
    Inventors: Ying-Hsin Li, Sheng-Chieh Yang, An Shih, Ming-Dou Ker, Tang-Kui Tseng, Chih-Kang Deng
  • Publication number: 20060126748
    Abstract: A method for reducing the peak-to-average power ratio of the time-domain signal in a communication system using multi-carrier modulation is provided herein. The present invention is based on the method of recursive clipping and filtering to reduce the peak-to-average power ratio and out-of-band spectrum, but during the recursive process, the distortion of the multi-carrier modulated signal is controlled to be bounded within a specific region. In an additive white Gaussian noise channel with high signal-to-noise ratio, the present invention could achieve significantly lower error rate and the error floor phenomenon is almost completely removed. Therefore the power amplifier could be operated at higher average output power and a smaller range of linearity.
    Type: Application
    Filed: July 19, 2005
    Publication date: June 15, 2006
    Inventors: Mao-Chao Lin, Shang-Kang Deng
  • Publication number: 20040245574
    Abstract: An ESD protection device with thicker polysilicon film, an electronic apparatus having the same, and a method for manufacturing the same are provided. The ESD protection device can be a diode or a MOS transistor with a thicker polysilicon film employed in an ESD protection circuit to protect an electronic apparatus. The electronic apparatus includes a substrate having a device area and an ESD protection circuit area. A first polysilicon film of a first thickness is formed on the device area of the substrate, so as to form an electronic device. A second polysilicon film of a second thickness is formed on the ESD protection circuit area, so as to form an ESD protection device. The second thickness, which is preferably about in the range of 100 to 500 nanometers, is thicker than the first thickness.
    Type: Application
    Filed: April 23, 2004
    Publication date: December 9, 2004
    Inventors: Ming-Dou Ker, Chih-Kang Deng, Tang-Kui Tseng, An Shih, Sheng-Chieh Yang
  • Publication number: 20040164381
    Abstract: A method and a structure of a diode are provided. The diode is used in an electrostatic discharge protection circuit using TFT (Thin Film Transistor) fabrication technology. A semiconductor layer is formed on a substrate. A first region of a first carrier concentration is formed in the semiconductor layer. A second region of a second carrier concentration is formed in the semiconductor layer. An insulator is formed on the semiconductor layer. The insulator layer is etched to form at least a contact window. The contact window exposes a portion of an upper surface of the semiconductor layer. A metal layer is formed on the insulator layer. The metal layer fills up the contact window to contact the semiconductor layer.
    Type: Application
    Filed: February 20, 2004
    Publication date: August 26, 2004
    Inventors: Ying-Hsin Li, Sheng-Chieh Yang, An Shih, Ming-Dou Ker, Tang-Kui Tseng, Chih-Kang Deng
  • Publication number: 20040153580
    Abstract: A component based operation system dynamic device drive method, in which the operation system manages all the device and drive component object via device manager, the customer program creates drive component object through device manager, the device manager communicates with drive component object, and the drive component object supplies application interface to customer program. In this invention, the drive program is realized in component-wise way and only when drive program is needed by application program, the drive program is loaded and drive component object is created; once drive component object application ended, the drive program would be deleted and downloaded from internal storage.
    Type: Application
    Filed: December 30, 2003
    Publication date: August 5, 2004
    Inventors: Rong Chen, Yipeng Su, Yongwen Du, Kang Deng
  • Patent number: 4924956
    Abstract: A double-acting tandem free-piston engine comprising a housing including a cylinder having combustion chambers at opposite ends and one in its center with double-acting pistons displaceable between one end and the center chamber and between the other end and the center chamber. Each piston includes opposite piston heads with connecting rods between them together with balancing means to provide symmetrical piston movement. Each combustion chamber has a inlet port and valve and an exhaust valve, the valves timed to open and close to produce a pressure volume relationship therein wherein the pressure drops below atmospheric during at least a portion of the piston's displacement. The engine combined with a linear alternator in a hybrid vehicle powers electric wheel driving motors and stores power in its storage battery.
    Type: Grant
    Filed: February 9, 1988
    Date of Patent: May 15, 1990
    Assignee: RDG Inventions Corporation
    Inventors: Yuan Q. Deng, Kang Deng