Patents by Inventor Kang-Jong PENG

Kang-Jong PENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10888020
    Abstract: Examples herein relate to cooling systems. In one example, a cooling system comprises a plurality of adjacent fan modules configured to generate a plurality of cooling flows, a fan cage having a central axis adapted to contain the plurality of adjacent fan modules, the fan cage comprising a cavity on its central axis. Furthermore, the system comprises a first support bracket adapted to support the fan cage such that the fan cage rotates on its central axis and a bush established in the cavity of the fan cage. A first end of the bush is adapted to engage the first support bracket on a first surface of the fan cage.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: January 5, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Chin-Jung Tsao, Chih-Sheng Liao, Kang-Jong Peng, Jui Lin Chen, Chao Lin Hsiao
  • Publication number: 20180310432
    Abstract: Examples herein relate to cooling systems. In one example, a cooling system comprises a plurality of adjacent fan modules configured to generate a plurality of cooling flows, a fan cage having a central axis adapted to contain the plurality of adjacent fan modules, the fan cage comprising a cavity on its central axis. Furthermore, the system comprises a first support bracket adapted to support the fan cage such that the fan cage rotates on its central axis and a bush established in the cavity of the fan cage. A first end of the bush is adapted to engage the first support bracket on a first surface of the fan cage.
    Type: Application
    Filed: April 25, 2017
    Publication date: October 25, 2018
    Inventors: Chin-Jung TSAO, Chih-Sheng LIAO, Kang-Jong PENG, Jui Lin CHEN, Chao Lin HSIAO
  • Patent number: 10083146
    Abstract: In one example in accordance with the present disclosure, a system comprises a first computing device comprising a first baseboard management controller (BMC), a second computing device comprising a second BMC, a first universal serial bus (USB) port coupled to the first BMC, a second USB port coupled to the second BMC, a multiplexor coupled to the first USB port and the second USB port, a shared USB port coupled to the multiplexor, and a chassis manager coupled to the first computing device and the second computing device. The chassis manager may connect, with the multiplexor, the shared port to the first USB port or the second USB port.
    Type: Grant
    Filed: November 22, 2016
    Date of Patent: September 25, 2018
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Chin-Jung Tsao, Kang-Jong Peng, Chih-Sheng Liao, Chao-Lin Hsiao
  • Publication number: 20180143936
    Abstract: In one example in accordance with the present disclosure, a system comprises a first computing device comprising a first baseboard management controller (BMC), a second computing device comprising a second BMC, a first universal serial bus (USB) port coupled to the first BMC, a second USB port coupled to the second BMC, a multiplexor coupled to the first USB port and the second USB port, a shared USB port coupled to the multiplexor, and a chassis manager coupled to the first computing device and the second computing device. The chassis manager may connect, with the multiplexor, the shared port to the first USB port or the second USB port.
    Type: Application
    Filed: November 22, 2016
    Publication date: May 24, 2018
    Inventors: Chin-Jung Tsao, Kang-Jong Peng, Chih-Sheng Liao, Chao-Lin Hsiao
  • Publication number: 20170249279
    Abstract: A computing system for dynamically changing at least one input/output configuration between a motherboard of a computing device and at least one node connected to the motherboard includes a plurality of interchangeable topology transformation units (TTU) risers to connect at least one processing device located on a motherboard of the computing system to a plurality of computing nodes. Each of the TTU risers include topologies designed to support different workloads with respect to another TTU riser.
    Type: Application
    Filed: January 28, 2015
    Publication date: August 31, 2017
    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
    Inventors: Hung-Chu LEE, Tse-Jen SUNG, Chui Ching CHIU, Kang-Jong PENG, Vincent NGUYEN, Jim KUO