Patents by Inventor Kangoh YUN

Kangoh YUN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230402454
    Abstract: A semiconductor device includes a first isolation structure extending through an upper portion of a substrate and defining a first active region, a first gate structure on the substrate, and first source/drain regions at upper portions of the first active region adjacent to the first gate structure. The first isolation structure includes an upper isolation pattern structure and a lower isolation pattern. The upper isolation pattern structure includes a first isolation pattern and a second isolation pattern covering a sidewall of the first isolation pattern. The lower isolation pattern is formed under and contacting the upper isolation pattern structure, and a width of the lower isolation pattern is greater than a width of the upper isolation pattern structure.
    Type: Application
    Filed: April 12, 2023
    Publication date: December 14, 2023
    Inventors: Dongjin Lee, Junhee Lim, Kangoh Yun, Sohyun Lee
  • Patent number: 11575009
    Abstract: A semiconductor device includes a gate structure disposed on a substrate. The gate structure has a first sidewall and a second sidewall facing the first sidewall. A first impurity region is disposed within an upper portion of the substrate. The first impurity region is spaced apart from the first sidewall. A third impurity region is within the upper portion of the substrate. The third impurity region is spaced apart from the second sidewall. A first trench is disposed within the substrate between the first sidewall and the first impurity region. The first trench is spaced apart from the first sidewall. A first barrier insulation pattern is disposed within the first trench.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: February 7, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sungkweon Baek, Taeyoung Kim, Hakseon Kim, Kangoh Yun, Changhoon Jeon, Junhee Lim
  • Publication number: 20210028283
    Abstract: A semiconductor device includes a gate structure disposed on a substrate. The gate structure has a first sidewall and a second sidewall facing the first sidewall. A first impurity region is disposed within an upper portion of the substrate. The first impurity region is spaced apart from the first sidewall. A third impurity region is within the upper portion of the substrate. The third impurity region is spaced apart from the second sidewall. A first trench is disposed within the substrate between the first sidewall and the first impurity region. The first trench is spaced apart from the first sidewall. A first barrier insulation pattern is disposed within the first trench.
    Type: Application
    Filed: March 18, 2020
    Publication date: January 28, 2021
    Inventors: Sungkweon BAEK, Taeyoung KIM, Hakseon KIM, Kangoh YUN, Changhoon JEON, Junhee LIM