Abstract: Self-aligning photolithography method and a method of fabricating a semiconductor device using the same, in which the photolithography method is performed using a lower pattern without employing a separate mask. The self-aligning photolithography method includes the steps of forming a lower pattern layer on a semiconductor substrate, depositing a photoresist, and subjecting to exposure without a photomask such that the photoresist aligned with the lower pattern layer is not to be exposed by diffraction of light, and either removing or leaving only the photoresist aligned with the lower pattern layer by development.

Abstract: The method of fabricating a semiconductor device having a dual-gate provides a semiconductor substrate with a gate insulating film formed on a first portion and a second portion thereof and a polysilicon layer formed on the gate insulating film. A first dopant of a first conductive type is implanted in the polysilicon layer covering the first portion, and a second dopant of a second conductive type is implanted in the polysilicon layer covering the second portion. Then, the polysilicon layer covering the first portion is selectively etched using a first mask to form a first gate, and a third dopant of the first conductive type is implanted to form source/drain LDD regions on both sides of the first gate. Thereafter, the polysilicon layer covering the second portion is selectively etched using a second mask to form a second gate, and a fourth dopant of the second conductive type is implanted to form source/drain LDD regions on both sides of the second gate.

Abstract: A semiconductor device and a method of fabricating the same are disclosed. The method includes the steps of forming an anti-oxidation layer on a substrate, forming an oxidizable layer on portions of the anti-oxidation layer to expose a portion of the anti-oxidation layer, varying a size of the exposed portion of the anti-oxidation layer by oxidizing at least a portion of the oxidizable layer, and forming a trench in the substrate according to the size of the exposed portion of the anti-oxidation layer. The semiconductor device includes an anti-oxidation layer formed on a substrate an oxidation layer formed on portions of the anti-oxidation layer by oxidizing at least a portion of an oxidizable layer, so as to define an isolation region of the semiconductor device, a trench formed in the substrate using the oxidation layer, and a field oxide layer formed in the trench.

Abstract: A semiconductor device and a method for fabricating the same suitable for increasing its tolerance and packing density are disclosed, the semiconductor device including a semiconductor substrate having a field region placed lower than surface of an active region; an isolation layer formed at the field region; a gate insulating layer and a gate electrode successively formed over the active region; and impurity regions formed in the exposed active region at both sides of the gate electrode.

Abstract: A method of forming first and second conductivity type wells in a semiconductor device includes the steps of forming an isolation layer on a semiconductor substrate, forming a multi-layer mask over a portion of the substrate to define the first and second conductivity type wells, implanting a first conductivity type impurity to form the first conductivity type well, removing a partial layer from the multi-layer mask, and implanting a second conductivity type impurity to form the second conductivity type well.