Abstract: A driver circuit for driving a load (3) connected between an output (FO) of a first channel driver (D1) and an output (RO) of a second channel driver (D2). The first and second channel drivers (D1, D2) each include switch transistors for charging and discharging the gates of upper and lower output transistors in response to a command from an input pulse, a charging/discharging circuit (A2, B2) for determining a charging/discharging speed, and a detector circuit (A1, B1) for detecting a state of the channel driver on the opposite side. A dead time period and a speed of charging/discharging the gates of the upper and lower output transistors are changed according to the state of the channel driver on the opposite side. Thus, it is possible to achieve a channel driver circuit which can prevent a shoot-through current, adjust an output slew rate, and obtain preferred linearity as an input-output characteristic.

Abstract: A driver circuit for driving a load (3) connected between an output (FO) of a first channel driver (D1) and an output (RO) of a second channel driver (D2). The first and second channel drivers (D1, D2) each include switch transistors for charging and discharging the gates of upper and lower output transistors in response to a command from an input pulse, a charging/discharging circuit (A2, B2) for determining a charging/discharging speed, and a detector circuit (A1, B1) for detecting a state of the channel driver on the opposite side. A dead time period and a speed of charging/discharging the gates of the upper and lower output transistors are changed according to the state of the channel driver on the opposite side. Thus, it is possible to achieve a channel driver circuit which can prevent a shoot-through current, adjust an output slew rate, and obtain preferred linearity as an input-output characteristic.

Abstract: A driver circuit for driving a load (3) connected between an output (FO) of a first channel driver (D1) and an output (RO) of a second channel driver (D2). The first and second channel drivers (D1, D2) each include switch transistors for charging and discharging the gates of upper and lower output transistors in response to a command from an input pulse, a charging/discharging circuit (A2, B2) for determining a charging/discharging speed, and a detector circuit (A1, B1) for detecting a state of the channel driver on the opposite side. A dead time period and a speed of charging/discharging the gates of the upper and lower output transistors are changed according to the state of the channel driver on the opposite side. Thus, it is possible to achieve a channel driver circuit which can prevent a shoot-through current, adjust an output slew rate, and obtain preferred linearity as an input-output characteristic.