Patents by Inventor Kang Won SEO
Kang Won SEO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12220980Abstract: A battery case structure for an electric vehicle, includes a side member in which a flange of the side member laterally provided in a battery case is deformed or broken from a partition to absorb an impact when a side collision occurs, minimizing the impact which is caused by the collision and is provided to penetrate into a battery. Furthermore, the partition of the side member is designed based on topology optimization to secure rigidity, protecting the battery against the impact.Type: GrantFiled: August 25, 2022Date of Patent: February 11, 2025Assignees: Hyundai Motor Company, Kia CorporationInventors: Kang Won Lee, So Young Jo, Jeong Hun Seo, In Gook Son
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Publication number: 20250018526Abstract: The embodiments relate to a polishing pad for use in a chemical mechanical planarization (CMP) process of semiconductors, to a process for preparing the same, and to a process for preparing a semiconductor device using the same. The polishing pad according to the embodiment adjusts the surface roughness characteristics of the polishing pad after polishing, whereby the polishing rate can be enhanced, and the surface residues, surface scratches, and chatter marks of the wafer can be remarkably reduced.Type: ApplicationFiled: July 25, 2024Publication date: January 16, 2025Inventors: Jae In AHN, Kyung Hwan KIM, Sung Hoon YUN, Jang Won SEO, Kang Sik MYUNG
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Publication number: 20250011551Abstract: A silicone rubber composition containing 30 to 50 parts by weight of a reinforcing filler, 5 to 10 parts by weight of silicone oil, and 1 to 5 parts by weight of a hydrophobic surface modifier, based on 100 parts by weight of silicone gum, and a brake caliper piston boot manufactured by molding the same and having excellent brake fluid resistance.Type: ApplicationFiled: April 23, 2024Publication date: January 9, 2025Applicants: HYUNDAI MOBIS CO., LTD., YOUNG SHIN TR CO., LTD., HRS CO., LTD.Inventors: Kang Won SEO, Chi Hoon JO, Moo Jin CHOI, Hyun Hwa HONG, Sei Min SON, Sung Ho CHO, Jin Yeop KIM, Han Jung SEO, Yong Gi MIN, Dong Hwan KIM, Jin Su JANG, Jin Sung KIM
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Patent number: 12157265Abstract: A method of manufacturing a coupler for an air suspension includes: preparing a topping cord sheet and a rubber band; connecting the topping cord sheet and the rubber band to each other by attaching the rubber band to an outer circumferential surface of the topping cord sheet; and vulcanizing an intermediately formed body made by the connecting of the topping cord sheet and the rubber band to each other.Type: GrantFiled: May 22, 2023Date of Patent: December 3, 2024Assignee: Hyundai Mobis Co., Ltd.Inventors: Kang Won Seo, Chang Ho Cho, Jong Hoon Kim
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Patent number: 11787102Abstract: A method of manufacturing a coupler for an air suspension includes: preparing a topping cord sheet and a rubber band; connecting the topping cord sheet and the rubber band to each other by attaching the rubber band to an outer circumferential surface of the topping cord sheet; and vulcanizing an intermediately formed body made by the connecting of the topping cord sheet and the rubber band to each other.Type: GrantFiled: September 28, 2021Date of Patent: October 17, 2023Assignees: HYUNDAI MOBIS CO., LTD., SUNJIN CO., LTD.Inventors: Kang Won Seo, Chang Ho Cho, Jong Hoon Kim
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Publication number: 20230286207Abstract: A method of manufacturing a coupler for an air suspension includes: preparing a topping cord sheet and a rubber band; connecting the topping cord sheet and the rubber band to each other by attaching the rubber band to an outer circumferential surface of the topping cord sheet; and vulcanizing an intermediately formed body made by the connecting of the topping cord sheet and the rubber band to each other.Type: ApplicationFiled: May 22, 2023Publication date: September 14, 2023Applicants: HYUNDAI MOBIS CO., LTD., SUNJIN CO., LTD.Inventors: Kang Won SEO, Chang Ho CHO, Jong Hoon KIM
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Patent number: 11751377Abstract: A method for fabricating a semiconductor device, including the steps of: providing a substrate having an etch stop layer formed thereon; forming a preliminary stacked structure on the etch stop layer, the preliminary stacked structure including a lower sacrifice layer contacting the etch stop layer, a support layer, and an upper sacrifice layer; forming a hole penetrating the preliminary stacked structure and the etch stop layer; forming a conductive pattern in the hole; removing the upper sacrifice layer and a portion of the support layer; removing the lower sacrifice layer; forming a first conductive layer covering the conductive pattern; and forming a dielectric layer covering the first conductive layer, a remaining portion of the support layer, and the etch stop layer.Type: GrantFiled: December 16, 2021Date of Patent: September 5, 2023Assignee: XIA TAI XIN SEMICONDUCTOR (QING DAO) LTD.Inventors: Hyunyoung Kim, Dowon Kwak, Kang-Won Seo
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Patent number: 11688684Abstract: A semiconductor structure and a method of fabricating the same is disclosed. The semiconductor device includes a conductive structure that comprises: an upper conductive line arranged above and in electrical connection with a circuit component in a lower device layer through a via plug, wherein the upper conductive line extends laterally over the via plug; an interposing layer having a substantially uniform thickness arranged between the via plug and the upper conductive line, and extending laterally beyond a planar projection of the via plug, wherein the upper conductive line is in electrical connection with the via plug through the interposing layer; and an overlayer is disposed over the upper conductive line.Type: GrantFiled: January 14, 2022Date of Patent: June 27, 2023Assignee: XIA TAI XIN SEMICONDUCTOR (QING DAO) LTD.Inventors: Hyunyoung Kim, Dowon Kwak, Kang-Won Seo
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Publication number: 20220139827Abstract: A semiconductor structure and a method of fabricating the same is disclosed. The semiconductor device includes a conductive structure that comprises: an upper conductive line arranged above and in electrical connection with a circuit component in a lower device layer through a via plug, wherein the upper conductive line extends laterally over the via plug; an interposing layer having a substantially uniform thickness arranged between the via plug and the upper conductive line, and extending laterally beyond a planar projection of the via plug, wherein the upper conductive line is in electrical connection with the via plug through the interposing layer; and an overlayer is disposed over the upper conductive line.Type: ApplicationFiled: January 14, 2022Publication date: May 5, 2022Inventors: HYUNYOUNG KIM, DOWON KWAK, KANG-WON SEO
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Patent number: 11302774Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a conductive pattern, a first conductive layer, and a dielectric layer. The conductive pattern extends upwardly from the substrate. The conductive pattern has a hollow structure. The first conductive layer covers the conductive pattern. The dielectric layer at least covers the first conductive layer.Type: GrantFiled: November 18, 2019Date of Patent: April 12, 2022Assignee: XIA TAI XIN SEMICONDUCTOR (QING DAO) LTD.Inventors: Hyunyoung Kim, Dowon Kwak, Kang-Won Seo
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Publication number: 20220108986Abstract: A method for fabricating a semiconductor device, including the steps of: providing a substrate having an etch stop layer formed thereon; forming a preliminary stacked structure on the etch stop layer, the preliminary stacked structure including a lower sacrifice layer contacting the etch stop layer, a support layer, and an upper sacrifice layer; forming a hole penetrating the preliminary stacked structure and the etch stop layer; forming a conductive pattern in the hole; removing the upper sacrifice layer and a portion of the support layer; removing the lower sacrifice layer; forming a first conductive layer covering the conductive pattern; and forming a dielectric layer covering the first conductive layer, a remaining portion of the support layer, and the etch stop layer.Type: ApplicationFiled: December 16, 2021Publication date: April 7, 2022Inventors: HYUNYOUNG KIM, DOWON KWAK, KANG-WON SEO
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Publication number: 20220097290Abstract: A method of manufacturing a coupler for an air suspension includes: preparing a topping cord sheet and a rubber band; connecting the topping cord sheet and the rubber band to each other by attaching the rubber band to an outer circumferential surface of the topping cord sheet; and vulcanizing an intermediately formed body made by the connecting of the topping cord sheet and the rubber band to each other.Type: ApplicationFiled: September 28, 2021Publication date: March 31, 2022Applicants: HYUNDAI MOBIS CO., LTD., SUNJIN CO., LTD.Inventors: Kang Won SEO, Chang Ho CHO, Jong Hoon KIM
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Patent number: 11257752Abstract: A semiconductor structure and a method of fabricating the same is disclosed. The semiconductor device includes a conductive structure that comprises: an upper conductive line arranged above and in electrical connection with a circuit component in a lower device layer through a via plug, wherein the upper conductive line extends laterally over the via plug; an interposing layer having a substantially uniform thickness arranged between the via plug and the upper conductive line, and extending laterally beyond a planar projection of the via plug, wherein the upper conductive line is in electrical connection with the via plug through the interposing layer; and an overlayer is disposed over the upper conductive line.Type: GrantFiled: December 5, 2019Date of Patent: February 22, 2022Assignee: XIA TAI XIN SEMICONDUCTOR (QING DAO) LTD.Inventors: Hyunyoung Kim, Dowon Kwak, Kang-Won Seo
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Patent number: 11233056Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a conductive pattern, a support structure, a first conductive layer, and a dielectric layer. The conductive pattern extends vertically from the substrate. The support structure extends from an outer sidewall of the conductive pattern. The first conductive layer covers the conductive pattern. The dielectric layer at least covers the first conductive layer and the support structure.Type: GrantFiled: November 18, 2019Date of Patent: January 25, 2022Assignee: XIA TAI XIN SEMICONDUCTOR (QING DAO) LTD.Inventors: Hyunyoung Kim, Dowon Kwak, Kang-Won Seo
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Patent number: 11152253Abstract: A semiconductor structure and a method of fabricating the same is disclosed. The structure comprises: a substrate having a device region; a contact plug arranged over the device region and enables electrical connection to a semiconductor device in the device region; a separation layer arranged above and exposing the contact plug; a cylindrical tubular metal feature arranged above the separation layer; and a dielectric layer laterally surrounding the cylindrical tubular conductive feature, having a substantially stepped dopant concentration distribution comprised of two distinct dopant species. The dopant concentration level decreases from a lower region nearest the separation layer toward an upper region farther from the separation layer. An inter-dopant ratio between the distinct dopant species increases from the lower region toward the upper region. The cylindrical tubular metal feature has a sidewall profile that is substantially perpendicular to a surface of the substrate.Type: GrantFiled: January 10, 2020Date of Patent: October 19, 2021Assignee: XIA TAI XIN SEMICONDUCTOR (QING DAO) LTD.Inventors: Jee-Hoon Kim, Hyunyoung Kim, Kang-Won Seo
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Patent number: 11133248Abstract: A semiconductor structure and a method of fabricating the same is disclosed. The semiconductor structure includes an interconnect structure that comprises: a plurality of conductive features over a substrate arranged separately adjacent one another; a liner conformally formed over and between the plurality of conductive features and defining a trench having a first depth between adjacent pair of the conducive features, wherein a horizontal coverage of the liner over respective top surfaces of the conductive features has thickness lower than that of a vertical coverage over respective sidewalls of the conductive features; and a dielectric layer on the liner over top surfaces of the conductive features, wherein the dielectric layer seals the respective trench and forms a void between adjacent pair of the conductive features.Type: GrantFiled: November 11, 2019Date of Patent: September 28, 2021Assignee: XIA TAI XIN SEMICONDUCTOR (QING DAO) LTD.Inventors: Hyunyoung Kim, Dowon Kwak, Kang-Won Seo
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Publication number: 20210217658Abstract: A semiconductor structure and a method of fabricating the same is disclosed. The structure comprises: a substrate having a device region; a contact plug arranged over the device region and enables electrical connection to a semiconductor device in the device region; a separation layer arranged above and exposing the contact plug; a cylindrical tubular metal feature arranged above the separation layer; and a dielectric layer laterally surrounding the cylindrical tubular conductive feature, having a substantially stepped dopant concentration distribution comprised of two distinct dopant species. The dopant concentration level decreases from a lower region nearest the separation layer toward an upper region farther from the separation layer. An inter-dopant ratio between the distinct dopant species increases from the lower region toward the upper region. The cylindrical tubular metal feature has a sidewall profile that is substantially perpendicular to a surface of the substrate.Type: ApplicationFiled: January 10, 2020Publication date: July 15, 2021Inventors: JEE-HOON KIM, HYUNYOUNG KIM, KANG-WON SEO
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Publication number: 20210151553Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a conductive pattern, a first conductive layer, and a dielectric layer. The conductive pattern extends upwardly from the substrate. The conductive pattern has a hollow structure. The first conductive layer covers the conductive pattern. The dielectric layer at least covers the first conductive layer.Type: ApplicationFiled: November 18, 2019Publication date: May 20, 2021Inventors: HYUNYOUNG KIM, DOWON KWAK, KANG-WON SEO
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Publication number: 20210143097Abstract: A semiconductor structure and a method of fabricating the same is disclosed. The semiconductor structure includes an interconnect structure that comprises: a plurality of conductive features over a substrate arranged separately adjacent one another; a liner conformally formed over and between the plurality of conductive features and defining a trench having a first depth between adjacent pair of the conducive features, wherein a horizontal coverage of the liner over respective top surfaces of the conductive features has thickness lower than that of a vertical coverage over respective sidewalls of the conductive features; and a dielectric layer on the liner over top surfaces of the conductive features, wherein the dielectric layer seals the respective trench and forms a void between adjacent pair of the conductive features.Type: ApplicationFiled: November 11, 2019Publication date: May 13, 2021Inventors: HYUNYOUNG KIM, DOWON KWAK, KANG-WON SEO
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Publication number: 20200219809Abstract: A semiconductor structure and a method of fabricating the same is disclosed. The semiconductor device includes a conductive structure that comprises: an upper conductive line arranged above and in electrical connection with a circuit component in a lower device layer through a via plug, wherein the upper conductive line extends laterally over the via plug; an interposing layer having a substantially uniform thickness arranged between the via plug and the upper conductive line, and extending laterally beyond a planar projection of the via plug, wherein the upper conductive line is in electrical connection with the via plug through the interposing layer; and an overlayer is disposed over the upper conductive line.Type: ApplicationFiled: December 5, 2019Publication date: July 9, 2020Inventors: HYUNYOUNG KIM, DOWON KWAK, KANG-WON SEO