Abstract: A positive electrode active material for a lithium secondary battery has secondary micro particles having an average particle size (D50) of 1 to 10 ?m formed by agglomeration of primary macro particles having an average particle size (D50) of 0.5 to 3 ?m and a lithium-M oxide coating layer on all or part of a surface, wherein M is at least one selected from the group consisting of boron, cobalt, manganese and magnesium. The secondary macro particles have an average particle size (D50) of 5 to 20 ?m formed by agglomeration of primary micro particles having a smaller average particle size (D50) than the primary macro particles. The primary macro particles and the primary micro particles are represented by LiaNi1?b?c?dCobMncQdO2+?, wherein 1.0?a?1.5, 0<b<0.2, 0<c<0.2, 0?d?0.1, 0<b+c+d?0.2, ?0.1???1.0, and Q is at least one type of metal selected from the group consisting of Al, Mg, V, Ti and Zr.

Abstract: A water-cooled heat dissipation module assembly capable of cooling a power module of a vehicle driving inverter system using a battery or fuel cell. The water-cooled heat dissipation module assembly includes a housing unit provided in the form of a housing having an opening portion at least partially opened at one side thereof. The housing unit and at least a part of a rim region of the cooling unit are made of a plastic material, and the housing unit and the cooling unit are joined to each other by plastic welding using a laser.

Abstract: A positive electrode active material for a lithium secondary battery has a mixture of microparticles having a predetermined average particle size (D50) and macroparticles having a larger average particle size (D50) than the microparticles. The microparticles have the average particle size (D50) of 1 to 10 ?m and are at least one selected from the group consisting of particles having a carbon material coating layer on all or part of a surface of primary macroparticles having an average particle size (D50) of 1 ?m or more, particles having a carbon material coating layer on all or part of a surface of secondary particles formed by agglomeration of the primary macroparticles, and a mixture thereof. The macroparticles are secondary particles having an average particle size (D50) of 5 to 20 ?m formed by agglomeration of primary microparticles having a smaller average particle size (D50) than the primary macroparticles.

Abstract: Provided are a resin composition for coating an engine piston and a method of fabricating the same. The resin composition contains carbon nanotubes (CNTs) as a reinforcement and is capable of providing a coated layer on at least a part of the engine piston, and the method includes adjusting a parameter expressed as a product of a weight ratio of CNTs in the resin composition and an average aspect ratio of CNTs, to control a coefficient of friction of the coated layer and viscosity of the resin composition.

Abstract: Provided are a resin composition for coating an engine piston and a method of fabricating the same. The resin composition contains carbon nanotubes (CNTs) as a reinforcement and is capable of providing a coated layer on at least a part of the engine piston, and the method includes adjusting a parameter expressed as a product of a weight ratio of CNTs in the resin composition and an average aspect ratio of CNTs, to control a coefficient of friction of the coated layer and viscosity of the resin composition.

Abstract: A method of fabricating a semiconductor device includes forming a first electrode, sequentially forming a first dielectric film, a conductive film for a second electrode, a second dielectric film, and a conductive film for a third electrode above the first electrode, forming a first pattern on the conductive film for a third electrode, the first pattern defining a second electrode, forming the second electrode by sequentially patterning the conductive film for the third electrode, the second dielectric film, and the conductive film for the second electrode, using the first pattern as an etching mask, partially removing the first pattern to form a second pattern that defines a third electrode, and forming the third electrode by patterning the conductive film for the third electrode, using the second pattern as an etching mask, wherein the third electrode has a width less than that of the second electrode.

Abstract: Disclosed are methods of fabricating semiconductor devices. A method may include forming a first conductive layer, a first dielectric layer, a second conductive layer, a second dielectric layer, and a third conductive layer. The method may also include forming a mask layer on the third conductive layer, forming a photoresist pattern on the mask layer, and forming at least one middle electrode by patterning the mask layer, the third conductive layer, the second dielectric layer, and the second conductive layer using the photoresist pattern as an etching mask. The method may also include forming a mask pattern by selectively etching a side wall of the patterned mask layer, removing the photoresist pattern, and forming an upper electrode by patterning the third conductive layer using the mask pattern as an etching mask.

Abstract: A bipolar transistor having a base semiconductor layer structure to minimize base parasitic resistance and a method of manufacturing the bipolar transistor are provided. In the provided bipolar transistor, a collector region of a second conductivity type, which is defined by isolation regions, is formed on a semiconductor substrate of a first conductivity type. A first base semiconductor layer of the first conductivity type extends from the upper surface of the collector region to the upper surface of the isolation regions. Here, the first base semiconductor layer is formed of a silicon germanium (SiGe) layer. Second base semiconductor layers of the first conductivity type are formed on the portions of the first base semiconductor layer except for the portions having the emitter region and the emitter insulating layers. Base ohmic layers are formed on the second base semiconductor layers.

Abstract: A method of fabricating a semiconductor device includes forming a first electrode, sequentially forming a first dielectric film, a conductive film for a second electrode, a second dielectric film, and a conductive film for a third electrode above the first electrode, forming a first pattern on the conductive film for a third electrode, the first pattern defining a second electrode, forming the second electrode by sequentially patterning the conductive film for the third electrode, the second dielectric film, and the conductive film for the second electrode, using the first pattern as an etching mask, partially removing the first pattern to form a second pattern that defines a third electrode, and forming the third electrode by patterning the conductive film for the third electrode, using the second pattern as an etching mask, wherein the third electrode has a width less than that of the second electrode.

Abstract: Disclosed are methods of fabricating semiconductor devices. A method may include forming a first conductive layer, a first dielectric layer, a second conductive layer, a second dielectric layer, and a third conductive layer. The method may also include forming a mask layer on the third conductive layer, forming a photoresist pattern on the mask layer, and forming at least one middle electrode by patterning the mask layer, the third conductive layer, the second dielectric layer, and the second conductive layer using the photoresist pattern as an etching mask. The method may also include forming a mask pattern by selectively etching a side wall of the patterned mask layer, removing the photoresist pattern, and forming an upper electrode by patterning the third conductive layer using the mask pattern as an etching mask.

Abstract: A bipolar transistor includes a substrate having a collector region of a first conductivity type, a base layer of a second conductivity type extending horizontally over the collector region, and an emitter region of the first conductivity type at least partially contained in the base layer. The bipolar transistor also includes an emitter electrode confronting an upper surface of the emitter region, and a base electrode confronting an upper surface of the base layer. A vertical profile of at least a portion the base electrode is equal to or greater than a vertical profile of the emitter electrode.

Abstract: A bipolar transistor having a base semiconductor layer structure to minimize base parasitic resistance and a method of manufacturing the bipolar transistor are provided. In the provided bipolar transistor, a collector region of a second conductivity type, which is defined by isolation regions, is formed on a semiconductor substrate of a first conductivity type. A first base semiconductor layer of the first conductivity type extends from the upper surface of the collector region to the upper surface of the isolation regions. Here, the first base semiconductor layer is formed of a silicon germanium (SiGe) layer. Second base semiconductor layers of the first conductivity type are formed on the portions of the first base semiconductor layer except for the portions having the emitter region and the emitter insulating layers. Base ohmic layers are formed on the second base semiconductor layers.

Abstract: Bipolar junction transistors utilize trench-based base electrodes and lateral base electrode extensions to facilitate the use of preferred self-alignment processing techniques. A bipolar junction transistor is provided that includes an intrinsic collector region of first conductivity type in a semiconductor substrate. A trench is also provided in the substrate. This trench extends adjacent the intrinsic collector region. A base electrode of second conductivity type is provided in the trench and a base region of second conductivity type is provided in the intrinsic collector region. This base region is self-aligned to the base electrode and forms a P-N rectifying junction with the intrinsic collector region. An emitter region of first conductivity type is also provided in the base region and forms a P-N rectifying junction therewith.

Abstract: Bipolar junction transistors utilize trench-based base electrodes and lateral base electrode extensions to facilitate the use of preferred self-alignment processing techniques. A bipolar junction transistor is provided that includes an intrinsic collector region of first conductivity type in a semiconductor substrate. A trench is also provided in the substrate. This trench extends adjacent the intrinsic collector region. A base electrode of second conductivity type is provided in the trench and a base region of second conductivity type is provided in the intrinsic collector region. This base region is self-aligned to the base electrode and forms a P-N rectifying junction with the intrinsic collector region. An emitter region of first conductivity type is also provided in the base region and forms a P-N rectifying junction therewith.

Abstract: Bipolar junction transistors utilize trench-based base electrodes and lateral base electrode extensions to facilitate the use of preferred self-alignment processing techniques. A bipolar junction transistor is provided that includes an intrinsic collector region of first conductivity type in a semiconductor substrate. A trench is also provided in the substrate. This trench extends adjacent the intrinsic collector region. A base electrode of second conductivity type is provided in the trench and a base region of second conductivity type is provided in the intrinsic collector region. This base region is self-aligned to the base electrode and forms a P-N rectifying junction with the intrinsic collector region. An emitter region of first conductivity type is also provided in the base region and forms a P-N rectifying junction therewith.

Abstract: Highly integrated bipolar junction transistors include a semiconductor region, a collector region of first conductivity type in the semiconductor region and a trench extending adjacent the collector region. A three-dimensional base region of second conductivity type is also provided. The base region extends along a bottom of the trench and forms a P-N junction with the collector region. An emitter region of first conductivity type is also provided in the base region. The emitter region extends along a sidewall of the trench. The base region preferably comprises an extrinsic base region extending opposite the bottom of the trench and an intrinsic base region extending opposite the sidewall of the trench. The conductivity of the extrinsic base region is greater than the conductivity of the intrinsic base region.