Patents by Inventor Kang-Yi Fan

Kang-Yi Fan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11974071
    Abstract: The present invention provides a control method of a processor, wherein the control method comprises the steps of: transmitting image data of a first frame to an integrated circuit, wherein the first frame corresponds to a first frame rate; determining a second frame rate of a second frame next to the first frame; determining if a difference between the second frame rate and the first frame rate belongs to a large scale frame rate adjustment or a small scale frame rate adjustment; if the difference between the second frame rate and the first frame rate belongs to the large scale frame rate adjustment, using a first mode to transmit image data of the second frame; and if the difference between the second frame rate and the first frame rate belongs to the small scale frame rate adjustment, using a second mode to transmit image data of the second frame.
    Type: Grant
    Filed: August 21, 2022
    Date of Patent: April 30, 2024
    Assignee: MEDIATEK INC.
    Inventors: Kang-Yi Fan, Chin-Wen Liang, Chang-Chu Liu, Sheng-Hsiang Chang, You-Min Yeh
  • Publication number: 20220408054
    Abstract: The present invention provides a control method of a processor, wherein the control method comprises the steps of: transmitting image data of a first frame to an integrated circuit, wherein the first frame corresponds to a first frame rate; determining a second frame rate of a second frame next to the first frame; determining if a difference between the second frame rate and the first frame rate belongs to a large scale frame rate adjustment or a small scale frame rate adjustment; if the difference between the second frame rate and the first frame rate belongs to the large scale frame rate adjustment, using a first mode to transmit image data of the second frame; and if the difference between the second frame rate and the first frame rate belongs to the small scale frame rate adjustment, using a second mode to transmit image data of the second frame.
    Type: Application
    Filed: August 21, 2022
    Publication date: December 22, 2022
    Applicant: MEDIATEK INC.
    Inventors: Kang-Yi Fan, Chin-Wen Liang, Chang-Chu Liu, Sheng-Hsiang Chang, You-Min Yeh
  • Patent number: 11457173
    Abstract: The present invention provides a control method of a processor, wherein the control method comprises the steps of: transmitting image data of a first frame to an integrated circuit, wherein the first frame corresponds to a first frame rate; determining a second frame rate of a second frame next to the first frame; determining if a difference between the second frame rate and the first frame rate belongs to a large scale frame rate adjustment or a small scale frame rate adjustment; if the difference between the second frame rate and the first frame rate belongs to the large scale frame rate adjustment, using a first mode to transmit image data of the second frame; and if the difference between the second frame rate and the first frame rate belongs to the small scale frame rate adjustment, using a second mode to transmit image data of the second frame.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: September 27, 2022
    Assignee: MEDIATEK INC.
    Inventors: Kang-Yi Fan, Chin-Wen Liang, Chang-Chu Liu, Sheng-Hsiang Chang, You-Min Yeh
  • Publication number: 20210280148
    Abstract: The present invention provides a processor including a source generator, a request synchronization signal generator and an output circuit. The source generator is configured to generate image data of a frame. The request synchronization signal generator is configured to generate a request synchronization signal to an integrated circuit only after the source generator generates the image data of the frame completely, wherein the request synchronization signal is used to trigger the integrated circuit to send a synchronization signal to the processor. The output circuit is configured to send the image data of the frame to the integrated circuit only after receiving the synchronization signal generated from the integrated circuit in response to the request synchronization signal.
    Type: Application
    Filed: February 24, 2021
    Publication date: September 9, 2021
    Inventors: Chang-Chu Liu, Sheng-Hsiang Chang, Kang-Yi Fan, You-Min Yeh
  • Publication number: 20210266495
    Abstract: The present invention provides a control method of a processor, wherein the control method comprises the steps of: transmitting image data of a first frame to an integrated circuit, wherein the first frame corresponds to a first frame rate; determining a second frame rate of a second frame next to the first frame; determining if a difference between the second frame rate and the first frame rate belongs to a large scale frame rate adjustment or a small scale frame rate adjustment; if the difference between the second frame rate and the first frame rate belongs to the large scale frame rate adjustment, using a first mode to transmit image data of the second frame; and if the difference between the second frame rate and the first frame rate belongs to the small scale frame rate adjustment, using a second mode to transmit image data of the second frame.
    Type: Application
    Filed: January 21, 2021
    Publication date: August 26, 2021
    Inventors: Kang-Yi Fan, Chin-Wen Liang, Chang-Chu Liu, Sheng-Hsiang Chang, You-Min Yeh