Patents by Inventor Kang-Yi Lien
Kang-Yi Lien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12162749Abstract: A semiconductor device and method of manufacturing the device that includes a growth die and a dummy die. The method includes patterning, on an integrated circuit wafer, at one least growth die, and patterning at least one dummy die that is positioned on at least a portion of a circumference of the integrated circuit wafer. The patterned growth and dummy dies are etched on the wafer. A bond wave is initiated at a starting point on the integrated circuit wafer. The starting point is positioned on an edge of the integrated circuit wafer opposite the portion on which the at least one dummy die is patterned. Upon application of pressure at the starting point, a uniform bond wave propagates across the wafers, bonding the two wafers together.Type: GrantFiled: August 9, 2023Date of Patent: December 10, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kang-Yi Lien, I-Hsuan Chiu, Yi-Chieh Huang, Chia-Ming Hung, Kuan-Chi Tsai, Hsiang-Fu Chen
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Publication number: 20240395897Abstract: A method of manufacturing a semiconductor device includes forming a conductive layer over a first substrate, forming at least one circuit element at least partially from a semiconductor material of a second substrate, bonding the first substrate to the second substrate, etching a through via extending through the second substrate to partially expose the conductive layer, depositing at least one conductive material in the through via to form a conductive through via electrically coupled to the conductive layer and over the second substrate to form a first contact structure electrically coupling the conductive through via to the at least one circuit element. The at least one circuit element includes at least one of a Schottky diode, a capacitor, or a resistor.Type: ApplicationFiled: July 31, 2024Publication date: November 28, 2024Inventors: Chia-Ming HUNG, I-Hsuan CHIU, Hsiang-Fu CHEN, Kang-Yi LIEN, Chu-Heng CHEN
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Publication number: 20240383005Abstract: A semiconductor device and method of manufacturing the device that includes a capacitive micromachined ultrasonic transducer (CMUT). The CMUT includes an integrated circuit substrate, and a sensing electrode positioned on the integrated substrate. The sensing electrode includes a sidewall that forms a wall of an isolation trench adjacent to the sensing electrode, and is patterned before covering dielectric layers are deposited. After patterning of the sensing electrode, one or more dielectric layers are patterned, with one dielectric layer patterned on the sensing electrode and sidewall, and which has a thickness corresponding to the surface roughness of the sensing electrode. The CMUT further includes a membrane positioned above the sensing electrode forming a cavity therein.Type: ApplicationFiled: July 26, 2024Publication date: November 21, 2024Inventors: Kang-Yi Lien, Kuan-Chi Tsai, Yi-Chieh Huang, Wei-Tung Huang, Hsiang-Fu Chen
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Publication number: 20240088074Abstract: Semiconductor structures and method of forming the same are provided. A semiconductor structure according to the present disclosure includes a metal feature in a dielectric layer, a passivation structure over the dielectric layer and the metal feature, a contact pad over the passivation structure, and a plurality of contact vias extending through the passivation structure and in contact with the metal feature and the contact pad.Type: ApplicationFiled: March 15, 2023Publication date: March 14, 2024Inventors: Chia-Feng Cheng, Kang-Yi Lien, Chia-Ping Lai
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Publication number: 20240038597Abstract: A method and a system for detecting a semiconductor device are provided. The method comprises obtaining an image of the semiconductor device, evaluating a feature of the image, detecting a defect of the semiconductor device based on the feature, extracting a defect information for the defect, calculating a defect die ratio (DDR) in response to the defect and analyzing a relation between the DDR and the defect information.Type: ApplicationFiled: July 28, 2022Publication date: February 1, 2024Inventors: FAN HU, WEN-CHUAN TAI, HSIANG-FU CHEN, I-CHIEH HUANG, TZU-CHIEH WEI, KANG-YI LIEN
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Patent number: 11834332Abstract: A semiconductor device and method of manufacturing the device that includes a growth die and a dummy die. The method includes patterning, on an integrated circuit wafer, at one least growth die, and patterning at least one dummy die that is positioned on at least a portion of a circumference of the integrated circuit wafer. The patterned growth and dummy dies are etched on the wafer. A bond wave is initiated at a starting point on the integrated circuit wafer. The starting point is positioned on an edge of the integrated circuit wafer opposite the portion on which the at least one dummy die is patterned. Upon application of pressure at the starting point, a uniform bond wave propagates across the wafers, bonding the two wafers together.Type: GrantFiled: February 14, 2022Date of Patent: December 5, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kang-Yi Lien, Kuan-Chi Tsai, Yi-Chieh Huang, Hsiang-Fu Chen, Chia-Ming Hung, I-Hsuan Chiu
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Publication number: 20230382723Abstract: A semiconductor device and method of manufacturing the device that includes a growth die and a dummy die. The method includes patterning, on an integrated circuit wafer, at one least growth die, and patterning at least one dummy die that is positioned on at least a portion of a circumference of the integrated circuit wafer. The patterned growth and dummy dies are etched on the wafer. A bond wave is initiated at a starting point on the integrated circuit wafer. The starting point is positioned on an edge of the integrated circuit wafer opposite the portion on which the at least one dummy die is patterned. Upon application of pressure at the starting point, a uniform bond wave propagates across the wafers, bonding the two wafers together.Type: ApplicationFiled: August 9, 2023Publication date: November 30, 2023Inventors: Kang-Yi Lien, I-Hsuan Chiu, Yi-Chieh Huang, Chia-Ming Hung, Kuan-Chi Tsai, Hsiang-Fu Chen
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Publication number: 20230278073Abstract: A semiconductor device and method of manufacturing the same that utilizes dielectric pedestals on a sensing electrode. The semiconductor device includes a one or more membranes and an integrated circuit substrate. The integrated circuit substrate includes one or more conductive components disposed within a first dielectric layer on the substrate, with the conductive components interconnected with respective integrated circuit components. The substrate further includes one or more sensing electrodes electrically coupled to the conductive components, and one or more dielectric pedestals positioned within a landing area of the sensing electrode. In addition, the semiconductor device includes at least one cavity that is formed by the membrane positioned over the sensing electrode.Type: ApplicationFiled: March 7, 2022Publication date: September 7, 2023Inventors: Kang-Yi Lien, Kuan-Chi Tsai, Yi-Chieh Huang, Hsiang-Fu Chen, Chia-Ming Hung, I-Hsuan Chiu
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Publication number: 20230282726Abstract: A semiconductor device includes a first substrate having opposite first and second sides, a first conductive layer on the first side of the first substrate, and a second substrate having opposite first and second sides. The second side of the second substrate is bonded to the first side of the first substrate. The second substrate includes a semiconductor material, and at least one circuit element electrically coupled to the first conductive layer. The at least one circuit element includes at least one of a Schottky diode configured by the semiconductor material and a first contact structure, a capacitor having a first electrode of the semiconductor material, or a resistor of the semiconductor material.Type: ApplicationFiled: June 14, 2022Publication date: September 7, 2023Inventors: Chia-Ming HUNG, I-Hsuan CHIU, Hsiang-Fu CHEN, Kang-Yi LIEN, Chu-Heng CHEN
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Publication number: 20230043571Abstract: A semiconductor device and method of manufacturing the device that includes a growth die and a dummy die. The method includes patterning, on an integrated circuit wafer, at one least growth die, and patterning at least one dummy die that is positioned on at least a portion of a circumference of the integrated circuit wafer. The patterned growth and dummy dies are etched on the wafer. A bond wave is initiated at a starting point on the integrated circuit wafer. The starting point is positioned on an edge of the integrated circuit wafer opposite the portion on which the at least one dummy die is patterned. Upon application of pressure at the starting point, a uniform bond wave propagates across the wafers, bonding the two wafers together.Type: ApplicationFiled: February 14, 2022Publication date: February 9, 2023Inventors: Kang-Yi Lien, Kuan-Chi Tsai, Yi-Chieh Huang, Hsiang-Fu Chen, Chia-Ming Hung, I-Hsuan Chiu
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Publication number: 20230036136Abstract: A semiconductor device and method of manufacturing the device that includes a capacitive micromachined ultrasonic transducer (CMUT). The CMUT includes an integrated circuit substrate, and a sensing electrode positioned on the integrated substrate. The sensing electrode includes a sidewall that forms a wall of an isolation trench adjacent to the sensing electrode, and is patterned before covering dielectric layers are deposited. After patterning of the sensing electrode, one or more dielectric layers are patterned, with one dielectric layer patterned on the sensing electrode and sidewall, and which has a thickness corresponding to the surface roughness of the sensing electrode. The CMUT further includes a membrane positioned above the sensing electrode forming a cavity therein.Type: ApplicationFiled: February 8, 2022Publication date: February 2, 2023Inventors: Kang-Yi Lien, Kuan-Chi Tsai, Yi-Chieh Huang, Wei-Tung Huang, Hsiang-Fu Chen
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Patent number: 9086409Abstract: The present invention is about a microfluidic chip for rapid detection of different target proteins and a method for using the same. The microfluidic chip utilizes antibody-conjugated magnetic beads to bind to the target proteins to form a magnetic complex, and then use the signal labeled-antibodies that can recognize said magnetic complex. Purifying said magnetic complex by the micro-magnetic field on biochip, and introducing said purified magnetic complex into the fluorescent detection area on the chip to detect the amount of the target protein in said purified complex immediately.Type: GrantFiled: March 9, 2010Date of Patent: July 21, 2015Assignee: NATIONAL CHENG KUNG UNIVERSITYInventors: Gwo-Bin Lee, Huan-Yao Lei, Yu-Fang Lee, Kang-Yi Lien
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Patent number: 8911989Abstract: The present invention provides a microfluidic biochip, which comprises: a fluid transportation unit having a fluid transportation reservoir and a fluid transportation air chamber; a first fluid storage reservoir; a second fluid storage reservoir; a first valve unit having a first valve and a first valve control air chamber; and a second valve unit having a second valve and a second valve control air chamber; wherein the first valve unit is located between the first fluid storage reservoir and the fluid transportation unit, the second valve unit is located between the second fluid storage reservoir and the fluid transportation unit, and the top portion of the fluid transportation reservoir and the valves are made of a flexible material. The structure of the present microfluidic biochip allows fluids to be transported and/or mixed therein.Type: GrantFiled: June 7, 2010Date of Patent: December 16, 2014Assignee: National Cheng Kung UniversityInventors: Gwo-Bin Lee, Sung-Yi Yang, Song-Bin Huang, Kang-Yi Lien, Chen-Hsun Weng
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Publication number: 20110136179Abstract: The present invention provides a microfluidic biochip, which comprises: a fluid transportation unit having a fluid transportation reservoir and a fluid transportation air chamber; a first fluid storage reservoir; a second fluid storage reservoir; a first valve unit having a first valve and a first valve control air chamber; and a second valve unit having a second valve and a second valve control air chamber; wherein the first valve unit is located between the first fluid storage reservoir and the fluid transportation unit, the second valve unit is located between the second fluid storage reservoir and the fluid transportation unit, and the top portion of the fluid transportation reservoir and the valves are made of a flexible material. The structure of the present microfluidic biochip allows fluids to be transported and/or mixed therein.Type: ApplicationFiled: June 7, 2010Publication date: June 9, 2011Applicant: National Cheng Kung UniversityInventors: Gwo BIN/LEE, Sung YI/YANG, Song BIN/HUANG, Kang YI/LIEN, Chen HSUN/WENG
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Publication number: 20100248258Abstract: The present invention is about a microfluidic chip for rapid detection of different target proteins and a method for using the same. The microfluidic chip utilizes antibody-conjugated magnetic beads to bind to the target proteins to form a magnetic complex, and then use the signal labeled-antibodies that can recognize said magnetic complex. Purifying said magnetic complex by the micro-magnetic field on biochip, and introducing said purified magnetic complex into the fluorescent detection area on the chip to detect the amount of the target protein in said purified complex immediately.Type: ApplicationFiled: March 9, 2010Publication date: September 30, 2010Applicant: National Cheng Kung UniversityInventors: Gwo-Bin Lee, Huan-Yao Lei, Yu-Fang Lee, Kang-Yi Lien