Patents by Inventor Kang-Jae Lee
Kang-Jae Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240150985Abstract: Proposed is a detachable mooring system for an offshore structure, including a first tension adjuster connected to an offshore structure, and blocking a pulling chain from proceeding from an outlet of a body toward an inlet, a second tension adjuster connected to one end of the pulling chain and blocking the pulling chain from proceeding from an outlet of a body toward an inlet, a mooring chain having a first longitudinal end connected to one surface of the second tension adjuster body and having a second longitudinal end connected to an anchor on the seabed, a first lead rope having one longitudinal end connected to one end of the pulling chain discharged out through the first tension adjuster outlet, and a second lead rope having one longitudinal end connected to the second tension adjuster body.Type: ApplicationFiled: January 3, 2024Publication date: May 9, 2024Applicants: KOREA INSTITUTE OF OCEAN SCIENCE & TECHNOLOGY, KOMS INC., DHMC CO., LTD.Inventors: Kang Su LEE, Hong Gun SUNG, Byoung Jae PARK, Jang Jin KIM, Hyun Kook KIM, Chang Hwan SEO, Kyung Seok LEE, Yoon Yong PARK
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Publication number: 20240121924Abstract: A water-cooled heat dissipation module assembly capable of cooling a power module of a vehicle driving inverter system using a battery or fuel cell. The water-cooled heat dissipation module assembly includes a housing unit provided in the form of a housing having an opening portion at least partially opened at one side thereof. The housing unit and at least a part of a rim region of the cooling unit are made of a plastic material, and the housing unit and the cooling unit are joined to each other by plastic welding using a laser.Type: ApplicationFiled: August 4, 2022Publication date: April 11, 2024Inventors: Kwan Ho RYU, Jeong Keun LEE, Min Woo LEE, Ju Hyun SUN, Tae Keun PARK, Kang Wook PARK, Lee Cheol JI, Hyeok Chul YANG, Tae Heon KIM, Keun Jae LEE
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Publication number: 20220266415Abstract: A substrate polishing apparatus according to an example embodiment may include a substrate carrier configured to grasp and move a substrate, a polishing pad configured to come into contact with a polishing target surface of the substrate and polish the polishing target surface of the substrate, and a spray unit including a spray member configured to spray a fluid toward the substrate carrier.Type: ApplicationFiled: February 24, 2022Publication date: August 25, 2022Applicant: KCTECH CO., LTD.Inventors: Sung Ho SHIN, Geun Sik YUN, Hee Cheul JUNG, Tae Hyeon KIM, Kang Jae LEE, Jin Su BAE, Sun Su KIM
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Patent number: 10459420Abstract: Disclosed are a method for setting a feed rate of a rotating cutting tool in real time and a device for controlling a feed rate of a rotating cutting tool in real time. The method includes: a vibration data collecting operation (S20) of collecting vibration information from a sensor installed in a machine tool (100); a chatter vibration trend diagram deducing operation (S30) of deducing a chatter vibration trend diagram (G) by simplifying an increase and a decrease of chatter vibration based on the collected vibration data; a chatter vibration trend determining operation (S40) of determining whether an inclination of the chatter vibration trend diagram (G) is increased or decreased; and tool feed rate adjusting operations (S51 and S52) of adjusting a feed rate of the tool to be decreased when the inclination of the chatter vibration trend diagram (G) is increased.Type: GrantFiled: December 8, 2015Date of Patent: October 29, 2019Assignee: DOOSAN MACHINE TOOLS CO., LTD.Inventors: Kang Jae Lee, Jin Suk Song
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Patent number: 10073660Abstract: Provided herein are a memory system and method of operating the memory system, which have improved reliability. A method of operating a controller for controlling a semiconductor memory device including a plurality of memory blocks, the method comprising generating a program command and a program address for performing a program operation on at least one page included in an open block, among the plurality of memory blocks, reading data from the at least one page corresponding to the program address and transmitting the program command and the program address to the semiconductor memory device when the number of fail bits included in data read from the at least one page is equal to or less than a first reference value.Type: GrantFiled: October 20, 2016Date of Patent: September 11, 2018Assignee: SK Hynix Inc.Inventors: Byoung Jun Park, Seong Jo Park, Kang Jae Lee
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Publication number: 20170371575Abstract: Provided herein are a memory system and method of operating the memory system, which have improved reliability. A method of operating a controller for controlling a semiconductor memory device including a plurality of memory blocks, the method comprising generating a program command and a program address for performing a program operation on at least one page included in an open block, among the plurality of memory blocks, reading data from the at least one page corresponding to the program address and transmitting the program command and the program address to the semiconductor memory device when the number of fail bits included in data read from the at least one page is equal to or less than a first reference value.Type: ApplicationFiled: October 20, 2016Publication date: December 28, 2017Inventors: Byoung Jun PARK, Seong Jo PARK, Kang Jae LEE
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Patent number: 9792992Abstract: The present disclosure relates to a semiconductor memory device and an operating method thereof. A semiconductor memory device includes a memory cell array including a plurality of memory blocks, a peripheral circuit: suitable for performing an erase operation and a program operation to the memory cell array, and a control logic suitable for controlling the peripheral circuit to erase all of the plurality of memory blocks and then to program the plurality of memory blocks with dummy data during the erase operation.Type: GrantFiled: July 21, 2016Date of Patent: October 17, 2017Assignee: SK Hynix Inc.Inventors: Byoung Jun Park, Seong Jo Park, Kang Jae Lee
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Publication number: 20170278574Abstract: The present disclosure relates to a semiconductor memory device and an operating method thereof. A semiconductor memory device includes a memory cell array including a plurality of memory blocks, a peripheral circuit: suitable for performing an erase operation and a program operation to the memory cell array, and a control logic suitable for controlling the peripheral circuit to erase all of the plurality of memory blocks and then to program the plurality of memory blocks with dummy data during the erase operation.Type: ApplicationFiled: July 21, 2016Publication date: September 28, 2017Inventors: Byoung Jun PARK, Seong Jo PARK, Kang Jae LEE
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Patent number: 9604287Abstract: Disclosed are a setting method and a control device of a depth of cut in an initial axial direction for a rotating cutting tool. A setting method of a depth of cut in an initial axial direction for a rotating cutting tool according to the present disclosure includes when a tool T is mounted on a spindle S, receiving an overhang length L of the tool T, the diameter D of the tool T, an overhang length ratio reference value C, and an axial depth of cut reference value E; calculating an axial depth of cut Y; and setting the axial depth of cut Y as an initial axial depth of cut of a cutting process.Type: GrantFiled: June 10, 2014Date of Patent: March 28, 2017Assignee: Doosan Machine Tools Co., Ltd.Inventors: Kang Jae Lee, Jin Suk Song, Han Kee Jang
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Patent number: 9588512Abstract: Disclosed is a setting method of revolutions per minute on a real time of a rotating cutting tool, and a control device, and more particularly, a vibration characteristic is consistently evaluated and analyzed when a cutting process is in progress to suppress and avoid suppression.Type: GrantFiled: June 10, 2014Date of Patent: March 7, 2017Assignee: Doosan Machine Tools Co., Ltd.Inventors: Kang Jae Lee, Jin Suk Song
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Publication number: 20160161936Abstract: Disclosed are a method for setting a feed rate of a rotating cutting tool in real time and a device for controlling a feed rate of a rotating cutting tool in real time. The method includes: a vibration data collecting operation (S20) of collecting vibration information from a sensor installed in a machine tool (100); a chatter vibration trend diagram deducing operation (S30) of deducing a chatter vibration trend diagram (G) by simplifying an increase and a decrease of chatter vibration based on the collected vibration data; a chatter vibration trend determining operation (S40) of determining whether an inclination of the chatter vibration trend diagram (G) is increased or decreased; and tool feed rate adjusting operations (S51 and S52) of adjusting a feed rate of the tool to be decreased when the inclination of the chatter vibration trend diagram (G) is increased.Type: ApplicationFiled: December 8, 2015Publication date: June 9, 2016Inventors: Kang Jae LEE, Jin Suk SONG
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Patent number: 8936983Abstract: A method of fabricating a semiconductor device according to present invention includes forming a stack layers on a semiconductor substrate having a first area and a second area; forming first gates on the semiconductor substrate of the first area by patterning the stack layers, wherein the first gates are formed a first distance apart from each other; forming a first impurity injection area in the semiconductor substrate of the first area exposed at both sides of each of the first gates; filling a space between the first gates with an insulating layer; forming second gates on the semiconductor substrate of the second area by patterning the stack layers, wherein the second gates are formed a second distance apart from each other, and wherein the second distance is larger than the first distance; and forming a second impurity injection area in the semiconductor device of the second area exposed between the second gates.Type: GrantFiled: December 14, 2011Date of Patent: January 20, 2015Assignee: SK Hynix Inc.Inventors: Kang Jae Lee, Eun Joo Jung
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Publication number: 20140364991Abstract: Disclosed is a setting method of revolutions per minute on a real time of a rotating cutting tool, and a control device, and more particularly, a vibration characteristic is consistently evaluated and analyzed when a cutting process is in progress to suppress and avoid suppression.Type: ApplicationFiled: June 10, 2014Publication date: December 11, 2014Inventors: Kang Jae LEE, Jin Suk SONG
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Publication number: 20140364990Abstract: Disclosed are a setting method and a control device of a depth of cut in an initial axial direction for a rotating cutting tool. A setting method of a depth of cut in an initial axial direction for a rotating cutting tool according to the present disclosure includes when a tool T is mounted on a spindle S, receiving an overhang length L of the tool T, the diameter D of the tool T, an overhang length ratio reference value C, and an axial depth of cut reference value E; calculating an axial depth of cut Y; and setting the axial depth of cut Y as an initial axial depth of cut of a cutting process.Type: ApplicationFiled: June 10, 2014Publication date: December 11, 2014Inventors: Kang Jae LEE, Jin Suk SONG, Han Kee JANG
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Patent number: 8519471Abstract: A method for fabricating a vertical channel type nonvolatile memory device includes forming alternately a plurality of interlayer dielectric layers and a plurality of conductive layers over a substrate, forming a trench having a plurality of recesses on a surface of the trench by etching the plurality of interlayer dielectric layers and a plurality of conductive layers, wherein the plurality of recesses are formed at a certain interval on the surface of the trench, forming a charge blocking layer over a plurality of surfaces of the plurality of recesses, forming a charge storage layer over the charge blocking layer for filling a plurality of the remaining recesses with a charge storage material, forming a tunnel dielectric layer to cover the charge storage layer, and forming a vertical channel layer by filling the remaining trench.Type: GrantFiled: December 9, 2010Date of Patent: August 27, 2013Assignee: Hynix Semiconductor Inc.Inventors: Seoung-Woo Kuk, Kang-Jae Lee
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Publication number: 20120156841Abstract: A method of fabricating a semiconductor device according to present invention includes forming a stack layers on a semiconductor substrate having a first area and a second area; forming first gates on the semiconductor substrate of the first area by patterning the stack layers, wherein the first gates are formed a first distance apart from each other; forming a first impurity injection area in the semiconductor substrate of the first area exposed at both sides of each of the first gates; filling a space between the first gates with an insulating layer; forming second gates on the semiconductor substrate of the second area by patterning the stack layers, wherein the second gates are formed a second distance apart from each other, and wherein the second distance is larger than the first distance; and forming a second impurity injection area in the semiconductor device of the second area exposed between the second gates.Type: ApplicationFiled: December 14, 2011Publication date: June 21, 2012Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Kang Jae LEE, Eun Joo JUNG
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Publication number: 20110147823Abstract: A method for fabricating a vertical channel type nonvolatile memory device includes forming alternately a plurality of interlayer dielectric layers and a plurality of conductive layers over a substrate, forming a trench having a plurality of recesses on a surface of the trench by etching the plurality of interlayer dielectric layers and a plurality of conductive layers, wherein the plurality of recesses are formed at a certain interval on the surface of the trench, forming a charge blocking layer over a plurality of surfaces of the plurality of recesses, forming a charge storage layer over the charge blocking layer for filling a plurality of the remaining recesses with a charge storage material, forming a tunnel dielectric layer to cover the charge storage layer, and forming a vertical channel layer by filling the remaining trench.Type: ApplicationFiled: December 9, 2010Publication date: June 23, 2011Inventors: Seoung-Woo KUK, Kang-Jae Lee