Patents by Inventor Kangsheng QIU

Kangsheng QIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240402093
    Abstract: Systems, apparatuses, and methods for detecting a location of a positioned sample may include an electrostatic holder configured to hold a sample and form a gap area between an outside edge of the sample and a structure of the electrostatic holder when the electrostatic holder holds the sample, wherein the gap area is coated with a first coating configured to reflect a first wavelength of light with first brightness and to reflect a second wavelength of the light with second brightness, the first wavelength is within a predetermined range of wavelengths, the second wavelength is outside the predetermined range of wavelengths, and the first brightness is higher than the second brightness; a light source configured to direct the light at the gap area; and an optical detector configured to image the light reflected off the gap area.
    Type: Application
    Filed: August 3, 2022
    Publication date: December 5, 2024
    Applicant: ASML Netherlands B.V.
    Inventors: Xiaodong MENG, Zhiwen KANG, Jian ZHANG, Kangsheng QIU
  • Publication number: 20240371599
    Abstract: Systems and methods for wafer grounding and wafer grounding location adjustment are disclosed. A first method may include receiving a first value of an electric characteristic associated with the wafer being grounded by an electric signal; determining a first control parameter using at least the first value; and controlling a characteristic of the electric signal using the first control parameter and the first value. A second method for adjusting a grounding location for a wafer may include terminating an electric connection between the wafer and at least one grounding pin in contact the wafer; adjusting a relative position between the wafer and the grounding pin; and restoring the electric connection between the grounding pin and the wafer. A third method may include causing a grounding pin to penetrate through a coating on the wafer by impact; and establishing an electrical connection between the grounding pin and the wafer.
    Type: Application
    Filed: July 15, 2024
    Publication date: November 7, 2024
    Applicant: ASML Netheriands B. V.
    Inventors: Yixiang WANG, Shibing Liu, Shanhul Cao, Kangsheng Qiu, Juying Dou, Ying Luo, Yinglong Li, Qiang Li, Ronald Van Der Wilk, Jan-Gerard Cornelis Ven Der Toorn
  • Patent number: 12051562
    Abstract: Systems and methods for wafer grounding and wafer grounding location adjustment are disclosed. A first method may include receiving a first value of an electric characteristic associated with the wafer being grounded by an electric signal; determining a first control parameter using at least the first value; and controlling a characteristic of the electric signal using the first control parameter and the first value. A second method for adjusting a grounding location for a wafer may include terminating an electric connection between the wafer and at least one grounding pin in contact the wafer; adjusting a relative position between the wafer and the grounding pin; and restoring the electric connection between the grounding pin and the wafer. A third method may include causing a grounding pin to penetrate through a coating on the wafer by impact; and establishing an electrical connection between the grounding pin and the wafer.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: July 30, 2024
    Assignee: ASML Netherlands B.V.
    Inventors: Yixiang Wang, Shibing Liu, Shanhui Cao, Kangsheng Qiu, Juying Dou, Ying Luo, Yinglong Li, Qiang Li, Ronald Van Der Wilk, Jan-Gerard Cornelis Van Der Toorn
  • Publication number: 20220277926
    Abstract: Systems and methods for wafer grounding and wafer grounding location adjustment are disclosed. A first method may include receiving a first value of an electric characteristic associated with the wafer being grounded by an electric signal; determining a first control parameter using at least the first value; and controlling a characteristic of the electric signal using the first control parameter and the first value. A second method for adjusting a grounding location for a wafer may include terminating an electric connection between the wafer and at least one grounding pin in contact the wafer; adjusting a relative position between the wafer and the grounding pin; and restoring the electric connection between the grounding pin and the wafer. A third method may include causing a grounding pin to penetrate through a coating on the wafer by impact; and establishing an electrical connection between the grounding pin and the wafer.
    Type: Application
    Filed: August 25, 2020
    Publication date: September 1, 2022
    Applicant: ASML Netherlands B.V.
    Inventors: Yixiang WANG, Shibing LIU, Shanhui CAO, Kangsheng QIU, Juying DOU, Ying LUO, Yinglong LI, Qiang LI, Ronald VAN DER WILK, Jan-Gerard Cornelis VAN DER TOORN