Abstract: The invention is an efficient system and method for re-partitioning an existing system-level design by boosting the fraction of system functionality that is implemented using embedded software. The invention comprises automated techniques for identifying hardware targets to be softened and techniques for automatically generating a new system-level architecture having a new hardware/software boundary.

Abstract: The invention is an efficient system and method for re-partitioning an existing system-level design by boosting the fraction of system functionality that is implemented using embedded software. The invention comprises automated techniques for identifying hardware targets to be softened and techniques for automatically generating a new system-level architecture having a new hardware/software boundary.

Abstract: A power estimation framework based on a network of power monitors that observe component- and system-level execution and power statistics at run time. Based on those statistics, the power monitors (i) select between multiple alternative power models for each component and/or (ii) configure the component power models to best negotiate the trade-off between efficiency and accuracy. This approach effectuates a co-coordinated, adaptive, spatio-temporal allocation of computational effort for power estimation. This approach yields large reductions in power estimation overhead while minimally impacting power estimation accuracy.

Abstract: A method of designing a communication architecture comprising receiving a partitioned system, communication architecture topology, input traces and performance matrices. Analyzing and creating communication analysis graph (CAG). Partitioning communication instances to create partition clusters. Evaluating cluster statistics related to the partition clusters and assigning parameter values to the partition clusters to form a new system with new communication architecture. Reanalyzing the new system and recomputing performance metrics. If performance is improved then synthesizing CATs to realize optimized protocols. If performance is not improved then the process is repeated.

Abstract: A circuit comprising a plurality of components sharing at least one shared resource, and a lottery manager. The lottery manager is adapted to receive request for ownership for the at least one shared resource from a subset of the plurality of components. Each of the subset of the plurality of components are assigned lottery tickets. The lottery manager is adapted to probabilistically choose one component from the subset of the plurality of components for assigning the at least one shared resource. The probabilistic choosing is weighted based on a number of lottery tickets being assigned to each of the subset of the plurality of components.

Abstract: An electronic system with a plurality of components interconnected by a plurality of shared communication channels. At least one component comprises a communication architecture tuner. The tuner enables the electronic system to adapt to changing communication needs of the electronic system.

Abstract: A circuit comprising a plurality of components sharing at least one shared resource, and a lottery manager. The lottery manager is adapted to receive request for ownership for said at least one shared resource from a subset of the plurality of components. Each of the subset of the plurality of components are assigned lottery tickets. The lottery manager is adapted to probabilistically choose one component from the subset of the plurality of components for assigning said at least one shared resource. The probabilistic choosing is weighted based on a number of lottery tickets being assigned to each of the subset of the plurality of components.