Patents by Inventor Kannan K. THANKAPPAN

Kannan K. THANKAPPAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220392893
    Abstract: Two approaches for on-chip ESD detection include variable dielectric width capacitor, and vertical metal-oxide-semiconductor (MOS) capacitor MOSCAP array. The variable dielectric width capacitor approach employs metal plates terminated with sharp corners to enhance local electric field and facilitate ready breakdown of a thin dielectric between the metal plates. The vertical MOSCAP array is composed of a capacitor array connected in series. Both approaches are incorporated in an example 22 nm fully depleted silicon-on-insulator. Vertical MOSCAP arrays detect ESD events starting from about 6 V with about 6 V granularity, while the variable dielectric width capacitor is suitable for detection of high ESD voltage from about 40 V and above.
    Type: Application
    Filed: May 27, 2021
    Publication date: December 8, 2022
    Applicant: The Regents of the University of California
    Inventors: Subramanian IYER, Kannan K. THANKAPPAN, Boris VAISBAND