Patents by Inventor Kao-Yu Hsu

Kao-Yu Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7009847
    Abstract: A connector concealment mechanism for computer peripheral device is proposed, which is designed for use in conjunction with a computer peripheral device equipped with an external connector for the connector to be concealable into the casing of the computer peripheral device when not in use, and be easily ejected out of the computer casing for use to connect the computer peripheral device to a computer unit. This feature allows the computer peripheral device to be more advantageous to use than the prior art due to the fact that it allows the user to conceal the connector into the casing of the computer peripheral device when not in use, without having using a separable cap which would easily get lost as in the case of the prior art, thus making the use of the computer peripheral device more convenient and trouble-free than prior art.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: March 7, 2006
    Assignee: Inventec Multimedia & Telecom Corporation
    Inventors: Kuo-Chang Wu, Yi-Min Tseng, Hsin-Chiang Ho, Ya-Chyi Chou, Kao-Yu Hsu
  • Patent number: 6482675
    Abstract: A flexible substrate strip comprises a plurality of substrate units adapted for mounting semiconductor chips. The surface of the flexible substrate strip is provided with a plurality of degating regions at locations such that the edges of mold runners and gates of a mold used to encapsulate the semiconductor chips in encapsulant material fit entirely within the degating regions when the substrate strip is placed in the mold during encapsulation of the semiconductor chips. The present invention is characterized in that each degating region has a buffer region at a location corresponding to the gate of the mold during encapsulation. The degating regions have a degating region material formed thereon with the buffer regions not coated with the degating region material. The adhesive force between the encapsulant material and the degating region material is less than the adhesive force between the encapsulant material and the substrate.
    Type: Grant
    Filed: June 12, 2001
    Date of Patent: November 19, 2002
    Assignee: Advanced Semiconductor Engineering Inc.
    Inventors: Kao-Yu Hsu, Shih Chang Lee, Wei-Chun Kung
  • Patent number: 6462421
    Abstract: A multichip module mainly comprises a first chip disposed on the upper surface of a substrate by wire bonding and a second chip disposed on the lower surface of the substrate by flip-chip bonding wherein the first chip and the second chip are of the same type. The upper surface of the substrate is provided with a plurality of wire bondable pads for electrical connecting to the first chip. The lower surface of the substrate is provided with a plurality of flip-chip pads for electrical connecting to the second chip. According to the present invention, the first and second chips are both oriented face up (with their bonding pads up with respect to the substrate) for bonding to the substrate. Thus, address assignment of the bonding pads on the two semiconductor chips conforms to each other.
    Type: Grant
    Filed: April 10, 2000
    Date of Patent: October 8, 2002
    Assignee: Advanced Semicondcutor Engineering, Inc.
    Inventors: Kao-Yu Hsu, Su Tao
  • Patent number: 6380002
    Abstract: A flexible substrate based BGA package mainly comprises a semiconductor chip securely attached onto a flexible film substrate through a nonconductive adhesive. The flexible film substrate is formed from a flexible film having a chip attaching area for carrying the semiconductor chip. The upper surface of the flexible film is provided with a plurality of chip connection pads, a plurality of solder pads, and at least a dummy pad which is disposed centrally on the chip attaching area. The purpose of the dummy pad is to increase the rigidity and strength of the central part of the chip attaching area. The chip connection pads are arranged about the periphery of the chip attaching area for electrically connected to the semiconductor chip. The solder pads are disposed about the dummy pad(s) and electrically connected to the corresponding chip connection pads.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: April 30, 2002
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Kao-Yu Hsu, Shih-Chang Lee
  • Patent number: 6338813
    Abstract: A molding method for a BGA semiconductor chip package comprising a substrate supporting an array of chips having two lines of bonding pads formed at two respective side thereof. The molding method comprises the steps of: (A) providing a molding apparatus comprising a molding die having a molding cavity and at least two runners connected to the molding cavity; (B) closing and clamping the molding die in a manner that the chips are located in the molding cavity thereof; (C) transferring a molding compound into the molding cavity wherein each chip is arranged in a manner that the two lines of bonding pads thereof are substantially perpendicular to the flowing direction of the molding compound; (D) curing the molding compound; and (E) unclamping and opening the molding die to take out the molded product.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: January 15, 2002
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Kao-Yu Hsu, Chun Hung Lin, Tao-Yu Chen
  • Publication number: 20010049159
    Abstract: A flexible substrate strip comprises a plurality of substrate units adapted for mounting semiconductor chips. The surface of the flexible substrate strip is provided with a plurality of degating regions at locations such that the edges of mold runners and gates of a mold used to encapsulate the semiconductor chips in encapsulant material fit entirely within the degating regions when the substrate strip is placed in the mold during encapsulation of the semiconductor chips. The present invention is characterized in that each degating region has a buffer region at a location corresponding to the gate of the mold during encapsulation. The degating regions have a degating region material formed thereon with the buffer regions not coated with the degating region material. The adhesive force between the encapsulant material and the degating region material is less than the adhesive force between the encapsulant material and the substrate.
    Type: Application
    Filed: June 12, 2001
    Publication date: December 6, 2001
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Kao-Yu Hsu, Shih Chang Lee, Wei-Chun Kung
  • Patent number: 6316828
    Abstract: The structure of a solder mask for the circuit module of a BGA substrate mainly comprises a power ring, a ground ring, a plurality of holes, a plurality of first holes and a plurality of second holes. The power ring and the ground ring are arranged between the chip area and the wire bonding area; the first openings are arranged on the power ring and the ground ring for receiving the electronic part. Thus the substrate meets the requirement of keeping the electronic part close to the chip. The second openings are arranged over the associated holes which electrically connect to the power ring and the ground ring by traces; these holes do need not to electrically connect the power layer and the ground layer of the substrate. The openings of the present invention use the power ring, ground ring and the holes of the substrate to electrically connect to the electronic parts, so that the present invention does not need to provide other holes or traces thus simplifying the structure of the substrate.
    Type: Grant
    Filed: November 9, 1999
    Date of Patent: November 13, 2001
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Su Tao, Tao-Yu Chen, Kao-Yu Hsu
  • Patent number: 6291271
    Abstract: A method of making a semiconductor chip package utilizes a film carrier to support a semiconductor chip. The method comprises the steps of: forming a plurality of through-holes in a film carrier; laminating a metal layer on the film carrier; etching the metal layer to form a die pad and a plurality of connection pads disposed corresponding to the through-holes; forming a metal coating on the surfaces of the die pad and the connection pads which are not covered by the film carrier; attaching a semiconductor chip to the die pad; electrically coupling the semiconductor chip to the connection pads; forming a package body over the film carrier and the semiconductor chip; and removing the film carrier.
    Type: Grant
    Filed: November 19, 1999
    Date of Patent: September 18, 2001
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Chi Lee, Kao-Yu Hsu
  • Publication number: 20010013647
    Abstract: A flexible substrate based BGA package mainly comprises a semiconductor chip securely attached onto a flexible film substrate through a nonconductive adhesive. The flexible film substrate is formed from a flexible film having a chip attaching area for carrying the semiconductor chip. The upper surface of the flexible film is provided with a plurality of chip connection pads, a plurality of solder pads, and at least a dummy pad which is disposed centrally on the chip attaching area. The purpose of the dummy pad is to increase the rigidity and strength of the central part of the chip attaching area. The chip connection pads are arranged about the periphery of the chip attaching area for electrically connected to the semiconductor chip. The solder pads are disposed about the dummy pad(s) and electrically connected to the corresponding chip connection pads.
    Type: Application
    Filed: April 23, 2001
    Publication date: August 16, 2001
    Inventors: Kao-Yu Hsu, Shih-Chang Lee
  • Patent number: 6271057
    Abstract: A method of making a semiconductor chip package is characterized in that it utilizes a flexible film carrier (instead of conventional lead frame or substrate) to support a semiconductor chip during the assembly process. The method comprises the steps of: forming a plurality of through-holes in a flexible film carrier; laminating a metal layer on the lower surface of the flexible film carrier; etching the metal layer to form a plurality of connection pads corresponding to the through-holes; forming a metal coating on the surfaces of the connection pads which are not covered by the flexible film carrier; attaching a semiconductor chip to the upper surface of the flexible film carrier; electrically coupling bonding pads on the semiconductor chip to the connection pads; forming a package body over the upper surface of the flexible film carrier and the semiconductor chip.
    Type: Grant
    Filed: November 19, 1999
    Date of Patent: August 7, 2001
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Chi Lee, Kao-Yu Hsu
  • Publication number: 20010010947
    Abstract: A film BGA package generally comprises a semiconductor chip disposed on a flexible film substrate. The flexible film substrate includes a plurality of solder pads formed on the central area thereof and a plurality of chip connection pads formed on the peripheral area thereof. The semiconductor chip is securely attached onto the upper surface of the flexible film substrate through a nonconductive adhesive and electrically connected to the chip connection pads. The chip connection pads are electrically connected to the corresponding solder pads. The flexible film substrate has a plurality of through-holes formed corresponding to the solder pads such that each solder pad has at least a portion exposed within the corresponding through-hole for mounting a solder ball.
    Type: Application
    Filed: February 16, 2001
    Publication date: August 2, 2001
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Kao-Yu Hsu, Su Tao, Shih-Chang Lee
  • Patent number: 6262490
    Abstract: A flexible substrate strip comprises a plurality of substrate units adapted for mounting semiconductor chips. The surface of the flexible substrate strip is provided with a plurality of degating regions at locations such that the edges of mold runners and gates of a mold used to encapsulate the semiconductor chips in encapsulant material fit entirely within the degating regions when the substrate strip is placed in the mold during encapsulation of the semiconductor chips. The present invention is characterized in that each degating region has a buffer region at a location corresponding to the gate of the mold during encapsulation. The degating regions have a degating region material formed thereon with the buffer regions not coated with the degating region material. The adhesive force between the encapsulant material and the degating region material is less than the adhesive force between the encapsulant material and the substrate.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: July 17, 2001
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Kao-Yu Hsu, Shih Chang Lee, Wei-Chun Kung
  • Patent number: 6242815
    Abstract: A flexible substrate based BGA package mainly comprises a semiconductor chip securely attached onto a flexible film substrate through a nonconductive adhesive. The flexible film substrate is formed from a flexible film having a chip attaching area for carrying the semiconductor chip. The upper surface of the flexible film is provided with a plurality of chip connection pads, a plurality of solder pads, and at least a dummy pad which is disposed centrally on the chip attaching area. The purpose of the dummy pad is to increase the rigidity and strength of the central part of the chip attaching area. The chip connection pads are arranged about the periphery of the chip attaching area for electrically connected to the semiconductor chip. The solder pads are disposed about the dummy pad(s) and electrically connected to the corresponding chip connection pads.
    Type: Grant
    Filed: December 7, 1999
    Date of Patent: June 5, 2001
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Kao-Yu Hsu, Shih-Chang Lee