Patents by Inventor Kaori Morita

Kaori Morita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Card device
    Patent number: 8259453
    Abstract: Disclosed herein is a card device including a semiconductor package section having memory functions and a substrate section joined to the semiconductor package section by superposition and mounted by a variety of electronic components. The semiconductor package section includes a card-side connector section having card-side terminals for inputting and outputting information signals, and package-side terminals at a location at which the semiconductor package section is joined to the substrate section by superposition. The substrate section includes substrate-side terminals at a location at which the substrate section is connected to the semiconductor package section by superposition. The substrate section is electrically joined to the semiconductor package section by making use of the package-side terminals and the substrate-side terminals.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: September 4, 2012
    Assignee: Sony Corporation
    Inventors: Kaori Morita, Tomoyasu Yamada, Tamotsu Kiyakawauchi, Akitomi Katsumura, Koji Shiozawa
  • CARD DEVICE
    Publication number: 20110157838
    Abstract: Disclosed herein is a card device including a semiconductor package section having memory functions and a substrate section joined to the semiconductor package section by superposition and mounted by a variety of electronic components. The semiconductor package section includes a card-side connector section having card-side terminals for inputting and outputting information signals, and package-side terminals at a location at which the semiconductor package section is joined to the substrate section by superposition. The substrate section includes substrate-side terminals at a location at which the substrate section is connected to the semiconductor package section by superposition. The substrate section is electrically joined to the semiconductor package section by making use of the package-side terminals and the substrate-side terminals.
    Type: Application
    Filed: December 10, 2010
    Publication date: June 30, 2011
    Applicant: SONY CORPORATION
    Inventors: KAORI MORITA, TOMOYASU YAMADA, TAMOTSU KIYAKAWAUCHI, AKITOMI KATSUMURA, KOJI SHIOZAWA