Patents by Inventor Kaori Takimoto
Kaori Takimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240145496Abstract: Imaging devices and ranging devices are disclosed. In one example, an imaging device includes a semiconductor substrate, a first pixel array, a second pixel array, and a control unit. In the first pixel array, a first light receiving pixel on the semiconductor substrate has a stacked structure of a first electrode, a photoelectric conversion layer, and a second electrode (80). It photoelectrically converts light in a first wavelength region including the visible light region. In the second pixel array, a second light receiving pixel is provided at a position overlapping the first light receiving pixel in a thickness direction of the semiconductor substrate. It photoelectrically converts light in a second wavelength region including the infrared light region. The control unit drives and controls the second pixel array based on a signal photoelectrically converted by the first pixel array.Type: ApplicationFiled: February 22, 2022Publication date: May 2, 2024Inventors: Hideaki Togashi, Kaori Takimoto, Masahiro Segami, Kei Nakagawa, Nobuhiro Kawai
-
Publication number: 20230034528Abstract: A solid state image sensor includes a semiconductor substrate where photoelectric conversion regions for converting light into charges are arranged per pixel planarly arranged; an organic photoelectric conversion film laminated at a light irradiated side of the semiconductor substrate via an insulation film and formed at the regions where the pixels are formed; a lower electrode formed at and in contact with the organic photoelectric conversion film at a semiconductor substrate side; a first upper electrode laminated at a light irradiated side of the organic photoelectric conversion film and formed such that ends of the first upper electrode are substantially conform with ends of the organic photoelectric conversion film when the solid state image sensor is planarly viewed; and a film stress suppressor for suppressing an effect of a film stress on the organic photoelectric conversion film, the film stress being generated on the first upper electrode.Type: ApplicationFiled: October 7, 2022Publication date: February 2, 2023Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Masahiro Joei, Kaori Takimoto
-
Patent number: 11489015Abstract: A solid state image sensor includes a semiconductor substrate where photoelectric conversion regions for converting light into charges are arranged per pixel planarly arranged; an organic photoelectric conversion film laminated at a light irradiated side of the semiconductor substrate via an insulation film and formed at the regions where the pixels are formed; a lower electrode formed at and in contact with the organic photoelectric conversion film at a semiconductor substrate side; a first upper electrode laminated at a light irradiated side of the organic photoelectric conversion film and formed such that ends of the first upper electrode are substantially conform with ends of the organic photoelectric conversion film when the solid state image sensor is planarly viewed; and a film stress suppressor for suppressing an effect of a film stress on the organic photoelectric conversion film, the film stress being generated on the first upper electrode.Type: GrantFiled: October 12, 2020Date of Patent: November 1, 2022Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Masahiro Joei, Kaori Takimoto
-
Publication number: 20220310680Abstract: The present disclosure relates to a backside illumination type solid-state imaging device, a manufacturing method for a backside illumination type solid-state imaging device, an imaging apparatus, and electronic equipment by which the manufacturing cost can be reduced. A singulated memory circuit and a singulated logic circuit are laid out in a horizontal direction and are embedded by an oxide film and flattened, and then are stacked so as to be contained in a plane direction under a solid-state imaging element. The present disclosure can be applied to an imaging apparatus.Type: ApplicationFiled: June 15, 2022Publication date: September 29, 2022Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Taizo TAKACHI, Yuichi YAMAMOTO, Suguru SAITO, Satoru WAKIYAMA, Yoichi OOTSUKA, Naoki KOMAI, Kaori TAKIMOTO, Tadashi IIJIMA, Masaki HANEDA, Masaya NAGATA
-
Patent number: 11454746Abstract: To make it possible to restrain generation of chipping or cracking in a substrate of a laminated lens structure. A laminated lens structure includes substrates with lens which each have a lens disposed inside a through-hole formed in the substrate and which are laminated on one another by direct bonding, in which the substrates are each provided in the vicinity of the outer circumference thereof with through grooves penetrating the substrate. The present technology is applicable, for example, to a compound eye camera module.Type: GrantFiled: January 16, 2018Date of Patent: September 27, 2022Assignee: Sony Semiconductor Solutions CorporationInventors: Atsushi Yamamoto, Kaori Takimoto
-
Patent number: 11282911Abstract: Display devices, display modules, and methods of manufacture are disclosed. In one example, a display device includes a pixel region in which pixels for displaying an image are arranged, on an upper surface of a substrate. A device-side signal electrode for exchanging a signal related to the pixels with an outside is disposed on a side surface of the substrate. A module casing is configured to store the display device and to have a casing-side signal electrode electrically connected to the device-side signal electrode in a spot facing the device-side signal electrode.Type: GrantFiled: April 14, 2017Date of Patent: March 22, 2022Assignee: Sony Group CorporationInventors: Hiroshi Horikoshi, Masato Kawashima, Kaori Takimoto, Masaya Nagata
-
Publication number: 20210028234Abstract: A solid state image sensor includes a semiconductor substrate where photoelectric conversion regions for converting light into charges are arranged per pixel planarly arranged; an organic photoelectric conversion film laminated at a light irradiated side of the semiconductor substrate via an insulation film and formed at the regions where the pixels are formed; a lower electrode formed at and in contact with the organic photoelectric conversion film at a semiconductor substrate side; a first upper electrode laminated at a light irradiated side of the organic photoelectric conversion film and formed such that ends of the first upper electrode are substantially conform with ends of the organic photoelectric conversion film when the solid state image sensor is planarly viewed; and a film stress suppressor for suppressing an effect of a film stress on the organic photoelectric conversion film, the film stress being generated on the first upper electrode.Type: ApplicationFiled: October 12, 2020Publication date: January 28, 2021Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Masahiro Joei, Kaori Takimoto
-
Patent number: 10840303Abstract: A solid state image sensor includes a semiconductor substrate where photoelectric conversion regions for converting light into charges are arranged per pixel planarly arranged; an organic photoelectric conversion film laminated at a light irradiated side of the semiconductor substrate via an insulation film and formed at the regions where the pixels are formed; a lower electrode formed at and in contact with the organic photoelectric conversion film at a semiconductor substrate side; a first upper electrode laminated at a light irradiated side of the organic photoelectric conversion film and formed such that ends of the first upper electrode are substantially conform with ends of the organic photoelectric conversion film when the solid state image sensor is planarly viewed; and a film stress suppressor for suppressing an effect of a film stress on the organic photoelectric conversion film, the film stress being generated on the first upper electrode.Type: GrantFiled: April 8, 2019Date of Patent: November 17, 2020Assignee: Sony Semiconductor Solutions CorporationInventors: Masahiro Joei, Kaori Takimoto
-
Publication number: 20200357838Abstract: Provided is a laminated lens structure capable of corresponding various optical parameters. The laminated lens structure includes at least one or more sheets of first lens-attached substrates and at least one or more sheets of second lens-attached substrates as a lens-attached substrate including a lens resin portion that forms a lens, and a carrier substrate that carries the lens resin portion. The carrier substrate of the first lens-attached substrates is constituted by laminating a plurality of sheets of carrier configuration substrates in a thickness direction, and the carrier substrate of the second lens-attached substrates is constituted by one sheet of carrier configuration substrate. For example, the present technology is applicable to a camera module and the like.Type: ApplicationFiled: August 17, 2018Publication date: November 12, 2020Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Munekatsu FUKUYAMA, Hirotaka YOSHIOKA, Kunihiko HIKICHI, Atsushi YAMAMOTO, Kaori TAKIMOTO, Minoru ISHIDA
-
Patent number: 10804312Abstract: The present disclosure relates to a semiconductor device, an electronic device, and a manufacturing method that can maintain the mounting reliability of an underfill. A chip is formed by a circuit 5 of an imaging element being produced on a Si substrate that is a first substrate and a second substrate being produced on an adhesive formed on the circuit. In this event, a photosensitive material is formed around the chip after the chip is mounted on a mounting substrate by a solder ball or in the state of the chip, then an underfill is formed, and then only the photosensitive 10 material is dissolved. The present disclosure can be applied to, for example, a CMOS solid-state imaging sensor used for an imaging device such as a camera.Type: GrantFiled: July 19, 2019Date of Patent: October 13, 2020Assignee: Sony CorporationInventors: Masaya Nagata, Kaori Takimoto
-
Publication number: 20200258924Abstract: The present disclosure relates to a backside illumination type solid-state imaging device, a manufacturing method for a backside illumination type solid-state imaging device, an imaging apparatus, and electronic equipment by which the manufacturing cost can be reduced. A singulated memory circuit and a singulated logic circuit are laid out in a horizontal direction and are embedded by an oxide film and flattened, and then are stacked so as to be contained in a plane direction under a solid-state imaging element. The present disclosure can be applied to an imaging apparatus.Type: ApplicationFiled: October 16, 2018Publication date: August 13, 2020Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Taizo TAKACHI, Yuichi YAMAMOTO, Suguru SAITO, Satoru WAKIYAMA, Yoichi OOTSUKA, Naoki KOMAI, Kaori TAKIMOTO, Tadashi IIJIMA, Masaki HANEDA, Masaya NAGATA
-
Publication number: 20190369299Abstract: To make it possible to restrain generation of chipping or cracking in a substrate of a laminated lens structure. A laminated lens structure includes substrates with lens which each have a lens disposed inside a through-hole formed in the substrate and which are laminated on one another by direct bonding, in which the substrates are each provided in the vicinity of the outer circumference thereof with through grooves penetrating the substrate. The present technology is applicable, for example, to a compound eye camera module.Type: ApplicationFiled: January 16, 2018Publication date: December 5, 2019Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Atsushi YAMAMOTO, Kaori TAKIMOTO
-
Publication number: 20190341417Abstract: The present disclosure relates to a semiconductor device, an electronic device, and a manufacturing method that can maintain the mounting reliability of an underfill. A chip is formed by a circuit of an imaging element being produced on a Si substrate that is a first substrate and a second substrate being produced on an adhesive formed on the circuit. In this event, a photosensitive material is formed around the chip after the chip is mounted on a mounting substrate by a solder ball or in the state of the chip, then an underfill is formed, and then only the photosensitive material is dissolved. The present disclosure can be applied to, for example, a CMOS solid-state imaging sensor used for an imaging device such as a camera.Type: ApplicationFiled: July 19, 2019Publication date: November 7, 2019Applicant: Sony CorporationInventors: Masaya NAGATA, Kaori TAKIMOTO
-
Patent number: 10403669Abstract: The present disclosure relates to a semiconductor device, an electronic device, and a manufacturing method that can maintain the mounting reliability of an underfill. A chip is formed by a circuit of an imaging element being produced on a Si substrate that is a first substrate and a second substrate being produced on an adhesive formed on the circuit. In this event, a photosensitive material is formed around the chip after the chip is mounted on a mounting substrate by a solder ball or in the state of the chip, then an underfill is formed, and then only the photosensitive material is dissolved. The present disclosure can be applied to, for example, a CMOS solid-state imaging sensor used for an imaging device such as a camera.Type: GrantFiled: June 2, 2016Date of Patent: September 3, 2019Assignee: Sony CorporationInventors: Masaya Nagata, Kaori Takimoto
-
Publication number: 20190237513Abstract: A solid state image sensor includes a semiconductor substrate where photoelectric conversion regions for converting light into charges are arranged per pixel planarly arranged; an organic photoelectric conversion film laminated at a light irradiated side of the semiconductor substrate via an insulation film and formed at the regions where the pixels are formed; a lower electrode formed at and in contact with the organic photoelectric conversion film at a semiconductor substrate side; a first upper electrode laminated at a light irradiated side of the organic photoelectric conversion film and formed such that ends of the first upper electrode are substantially conform with ends of the organic photoelectric conversion film when the solid state image sensor is planarly viewed; and a film stress suppressor for suppressing an effect of a film stress on the organic photoelectric conversion film, the film stress being generated on the first upper electrode.Type: ApplicationFiled: April 8, 2019Publication date: August 1, 2019Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Masahiro Joei, Kaori Takimoto
-
Patent number: 10304904Abstract: A solid state image sensor includes a semiconductor substrate where photoelectric conversion regions for converting light into charges are arranged per pixel planarly arranged; an organic photoelectric conversion film laminated at a light irradiated side of the semiconductor substrate via an insulation film and formed at the regions where the pixels are formed; a lower electrode formed at and in contact with the organic photoelectric conversion film at a semiconductor substrate side; a first upper electrode laminated at a light irradiated side of the organic photoelectric conversion film and formed such that ends of the first upper electrode are substantially conform with ends of the organic photoelectric conversion film when the solid state image sensor is planarly viewed; and a film stress suppressor for suppressing an effect of a film stress on the organic photoelectric conversion film, the film stress being generated on the first upper electrode.Type: GrantFiled: June 26, 2018Date of Patent: May 28, 2019Assignee: Sony Semiconductor Solutions CorporationInventors: Masahiro Joei, Kaori Takimoto
-
Publication number: 20190115414Abstract: [Object] To enable further reducing a chip area. [Solution] Provided is a display module including: a display device configured such that a pixel region in which a plurality of pixels for displaying an image are arranged is formed on an upper surface of a substrate, and a device-side signal electrode for exchanging a signal related to the pixels with an outside is disposed on a side surface of the substrate; and a module casing configured to store the display device and have a casing-side signal electrode electrically connected to the device-side signal electrode in a spot facing the device-side signal electrode.Type: ApplicationFiled: April 14, 2017Publication date: April 18, 2019Inventors: Hiroshi Horikoshi, Masato Kawashima, Kaori Takimoto, Masaya Nagata
-
Publication number: 20180301510Abstract: A solid state image sensor includes a semiconductor substrate where photoelectric conversion regions for converting light into charges are arranged per pixel planarly arranged; an organic photoelectric conversion film laminated at a light irradiated side of the semiconductor substrate via an insulation film and formed at the regions where the pixels are formed; a lower electrode formed at and in contact with the organic photoelectric conversion film at a semiconductor substrate side; a first upper electrode laminated at a light irradiated side of the organic photoelectric conversion film and formed such that ends of the first upper electrode are substantially conform with ends of the organic photoelectric conversion film when the solid state image sensor is planarly viewed; and a film stress suppressor for suppressing an effect of a film stress on the organic photoelectric conversion film, the film stress being generated on the first upper electrode.Type: ApplicationFiled: June 26, 2018Publication date: October 18, 2018Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Masahiro Joei, Kaori Takimoto
-
Patent number: 10014349Abstract: A solid state image sensor includes a semiconductor substrate where photoelectric conversion regions for converting light into charges are arranged per pixel planarly arranged; an organic photoelectric conversion film laminated at a light irradiated side of the semiconductor substrate via an insulation film and formed at the regions where the pixels are formed; a lower electrode formed at and in contact with the organic photoelectric conversion film at a semiconductor substrate side; a first upper electrode laminated at a light irradiated side of the organic photoelectric conversion film and formed such that ends of the first upper electrode are substantially conform with ends of the organic photoelectric conversion film when the solid state image sensor is planarly viewed; and a film stress suppressor for suppressing an effect of a film stress on the organic photoelectric conversion film, the film stress being generated on the first upper electrode.Type: GrantFiled: May 8, 2017Date of Patent: July 3, 2018Assignee: Sony Semiconductor Solutions CorporationInventors: Masahiro Joei, Kaori Takimoto
-
Publication number: 20180166491Abstract: The present disclosure relates to a semiconductor device, an electronic device, and a manufacturing method that can maintain the mounting reliability of an underfill. A chip is formed by a circuit of an imaging element being produced on a Si substrate that is a first substrate and a second substrate being produced on an adhesive formed on the circuit. In this event, a photosensitive material is formed around the chip after the chip is mounted on a mounting substrate by a solder ball or in the state of the chip, then an underfill is formed, and then only the photosensitive material is dissolved. The present disclosure can be applied to, for example, a CMOS solid-state imaging sensor used for an imaging device such as a camera.Type: ApplicationFiled: June 2, 2016Publication date: June 14, 2018Inventors: Masaya NAGATA, Kaori TAKIMOTO