Abstract: A substrate processing apparatus includes a coating section, a developing section, a heat-treating section and a transport mechanism. The coating section has first processing units each for performing a coverage process to supply a photoresist solution to a substrate and cover a surface of the substrate with the photoresist solution, a second processing unit for spinning the substrate, after the coverage process, at high speed to make the photoresist solution into a film, dry the photoresist film, and clean the substrate. All substrates are processed with the same coating conditions to suppress differences in quality among the substrates. The first and second processing units perform the respective processes concurrently to improve the throughput of substrate processing.

Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.

Abstract: A magnetic head shows a remarkably reduced eddy-current loss. The metal magnetic film 5 of the magnetic core of the magnetic head has a multilayer structure obtained by laying alternately metal magnetic layers 10 and insulating layers 11. The nonmagnetic film 6 of the magnetic head that provides a magnetic gap is also made to have a multilayer structure obtained by arranging first films 20 made of an insulating material, second films 21 made of Cr and a third film 22 made of Au as mentioned from the sides held in contact with the metal magnetic film 5.

Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.

Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.

Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.

Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.

Abstract: In a cylinder head 1 of an internal combustion engine, communicating passageways 17, 18, 17′, 18′ for coolant are provided between combustion chambers 3 and pass-through holes 21 to 28 at positions which overlap straight lines L1, L2 connecting centers C2, C3 of the exhaust port openings 6a, 7a with centers C5 to C8 of the pass-through holes 25 to 28 and straight lines L3, L4 connecting centers C9, C10 of the intake port openings 4a, 5a with centers C11 to c14 of the pass-through holes 21 to 24 when a mating surface 2 of the cylinder head 1 with the cylinder block is viewed from the bottom. When peripheries of the exhaust port openings 6a, 7a and intake port openings 4a, 5a thermally expand, the suppression of thermal expansion by the bolts at fastening portions is alleviated by the communicating passageways 17, 18, 17′, 18′.

Abstract: An atmospheric conditioning unit for supplying temperature- and humidity-controlled air to a chemical processing part (spin coater) is arranged immediately above a chemical processing part, between this chemical processing part and a heat treatment part (including a hot plate and a cool plate). Namely, the chemical processing part, the atmospheric conditioning unit and the heat treatment part are vertically arranged in a stacked manner. The atmospheric conditioning unit receives external air from an opening. A closed partition is provided to block air flow between the atmospheric conditioning unit and a transport area. The temperature- and humidity-controlled air supplied from the atmospheric conditioning unit to the spin coater forms a downflow in the spin coater, and thereafter rises through an opening and joins with the air flowing from the opening, to be introduced into the atmospheric conditioning unit again and reused.

Abstract: A substrate processing apparatus comprises a first substrate transfer unit having a first transfer path and a second substrate transfer unit having a second transfer path. A spin coating unit and a spin developing unit are arranged along the first transfer path, and a substrate cassette is arranged along the second transfer path. A substrate transport robot of the second substrate transfer unit selectively introduces a substrate received from a substrate transport robot of the first substrate transfer unit in one of external exposure apparatuses arranged on both end portions of the second transfer path, and discharges the substrate from the exposure apparatus for transfering the same to the substrate transport robot of the first substrate transfer unit. Thereby the substrate processing apparatus can avoid or relieve reduction of operational efficiency even if its throughput is different from that of an exposure apparatus.

Abstract: In an engine for a vehicle including a bearing cap integral type oil pan which has a plurality of bearing cap sections integrally provided thereon and which is integrally coupled to a cylinder block, connecting bolts are screwed into the bearing cap sections from the cylinder block to integrally couple the cylinder block and the oil pan to each other. An oil pan chamber, which is an as-cast bore made by drawing a die in an axial direction of a crankshaft, is defined to extend continuously in the axial direction of the crankshaft between the bearing cap sections and a bottom wall of the oil pan. Thus, the oil pan can be produced simply, at a low cost, by a casting process and moreover, it is possible to reduce the weight and size of the oil pan and increase the rigidity of the oil pan.

Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.

Abstract: An ATM communication system including a plurality of communication nodes connected in a loop form by buses, buffers disposed in each communication node, a synchronizing pulse generation circuit for conducting cell demultiplexing of all communication nodes at the same timing, storage devices disposed in each communication node to store mounting position information of the communication node and slot generator position information, and a circuit used by each communication node to automatically transmit and receive cells on the basis of position information described above.

Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.

Abstract: An apparatus including a structure which separates a first transport robot (high temperature robot), which accesses a first processing part group including the thermal processing parts, from a second transport robot (low temperature robot) which accesses the only non-thermal processing parts. During circulating transportation of substrates to be processed, heat created at thermal processing parts is prevented from flowing into non-thermal processing parts. Semiconductor wafers are circulated one by one between the first processing part group which includes a hot plate and a second processing part group which does not include a hot plate and processed one at a time at each processing part. The high temperature robot accesses the first processing part group while the low temperature robot accesses the second processing part group. Transfer of a semiconductor wafer between the two robots is performed at a transfer part which is formed using a cool plate.

Abstract: An ATM communication system including a plurality of communication nodes connected in a loop form by buses, buffers disposed in each communication node, a synchronizing pulse generation circuit for conducting cell demultiplexing of all communication nodes at the same timing, storage devices disposed in each communication node to store mounting position information of the communication node and slot generator position information, and a circuit used by each communication node to automatically transmit and receive cells on the basis of position information described above.

Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.

Abstract: A method for manufacturing a magnetic transducer head in which a track width regulating grooves provided on both edges of a magnetic gap are filled by blowing a powder beam of nonmagnetic material having a very fine particle size to deposit the nonmagnetic material in the grooves. A pair of magnetic core members are bonded together to form a magnetic gap therebetween by providing a metal layer of a bonding surface of the core members and applying a pressure to the core members under an elevated temperature to cause a mutual diffusion of the metal to bond the core members together. Thus the magnetic transducer head can be made without using a high-temperature heat treatment.

Abstract: An arrangement for heating the blow-by gas system of a water cooled type internal combustion engine by providing engine coolant conduits in heat exchange relationship with the blow-by gas hoses and PCV valve. In one embodiment a water jacket surrounds the PCV valve. The heat exchangers between the blow-by gas system hoses and the coolant hoses are parallel adjacent conduits in one embodiment and concentric conduits in another embodiment.

Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.