Patents by Inventor Kaoru Aoki

Kaoru Aoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6463057
    Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.
    Type: Grant
    Filed: November 20, 2000
    Date of Patent: October 8, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Kozaki, Junichirou Yanagi, Kiyoshi Aiki, Yutaka Ito, Kaoru Aoki, Shinobu Gohara
  • Patent number: 6424490
    Abstract: A magnetic head shows a remarkably reduced eddy-current loss. The metal magnetic film 5 of the magnetic core of the magnetic head has a multilayer structure obtained by laying alternately metal magnetic layers 10 and insulating layers 11. The nonmagnetic film 6 of the magnetic head that provides a magnetic gap is also made to have a multilayer structure obtained by arranging first films 20 made of an insulating material, second films 21 made of Cr and a third film 22 made of Au as mentioned from the sides held in contact with the metal magnetic film 5.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: July 23, 2002
    Assignee: Sony Corporation
    Inventors: Masaya Kousaka, Kaoru Aoki
  • Patent number: 6396831
    Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.
    Type: Grant
    Filed: November 20, 2000
    Date of Patent: May 28, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Kozaki, Junichirou Yanagi, Kiyoshi Aiki, Yutaka Ito, Kaoru Aoki, Shinobu Gohara
  • Patent number: 6339596
    Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.
    Type: Grant
    Filed: August 6, 1997
    Date of Patent: January 15, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Kozaki, Junichirou Yanagi, Kiyoshi Aiki, Yutaka Ito, Kaoru Aoki, Shinobu Gohara
  • Patent number: 6330240
    Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: December 11, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Kozaki, Junichirou Yanagi, Kiyoshi Aiki, Yutaka Ito, Kaoru Aoki
  • Publication number: 20010043597
    Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.
    Type: Application
    Filed: September 8, 1997
    Publication date: November 22, 2001
    Inventors: TAKAHIKO KOZAKI, JUNICHIROU YANAGI, KIYOSHI AIKI, YUTAKA ITO, KAORU AOKI, SHINOBU GOHARA
  • Publication number: 20010013326
    Abstract: In a cylinder head 1 of an internal combustion engine, communicating passageways 17, 18, 17′, 18′ for coolant are provided between combustion chambers 3 and pass-through holes 21 to 28 at positions which overlap straight lines L1, L2 connecting centers C2, C3 of the exhaust port openings 6a, 7a with centers C5 to C8 of the pass-through holes 25 to 28 and straight lines L3, L4 connecting centers C9, C10 of the intake port openings 4a, 5a with centers C11 to c14 of the pass-through holes 21 to 24 when a mating surface 2 of the cylinder head 1 with the cylinder block is viewed from the bottom. When peripheries of the exhaust port openings 6a, 7a and intake port openings 4a, 5a thermally expand, the suppression of thermal expansion by the bolts at fastening portions is alleviated by the communicating passageways 17, 18, 17′, 18′.
    Type: Application
    Filed: February 9, 2001
    Publication date: August 16, 2001
    Applicant: HONDA GIKEN KOGYO KABUSHIKI KAISHA
    Inventors: Takashi Komatsuda, Kaoru Aoki, Shinichi Takahashi, Takuya Takagi, Hiromu Nakamura, Tsutomu Yamasaki
  • Patent number: 6099643
    Abstract: An atmospheric conditioning unit for supplying temperature- and humidity-controlled air to a chemical processing part (spin coater) is arranged immediately above a chemical processing part, between this chemical processing part and a heat treatment part (including a hot plate and a cool plate). Namely, the chemical processing part, the atmospheric conditioning unit and the heat treatment part are vertically arranged in a stacked manner. The atmospheric conditioning unit receives external air from an opening. A closed partition is provided to block air flow between the atmospheric conditioning unit and a transport area. The temperature- and humidity-controlled air supplied from the atmospheric conditioning unit to the spin coater forms a downflow in the spin coater, and thereafter rises through an opening and joins with the air flowing from the opening, to be introduced into the atmospheric conditioning unit again and reused.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: August 8, 2000
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Masami Ohtani, Minobu Matsunaga, Tutomu Ueyama, Ryuji Kitakado, Kaoru Aoki
  • Patent number: 5963753
    Abstract: A substrate processing apparatus comprises a first substrate transfer unit having a first transfer path and a second substrate transfer unit having a second transfer path. A spin coating unit and a spin developing unit are arranged along the first transfer path, and a substrate cassette is arranged along the second transfer path. A substrate transport robot of the second substrate transfer unit selectively introduces a substrate received from a substrate transport robot of the first substrate transfer unit in one of external exposure apparatuses arranged on both end portions of the second transfer path, and discharges the substrate from the exposure apparatus for transfering the same to the substrate transport robot of the first substrate transfer unit. Thereby the substrate processing apparatus can avoid or relieve reduction of operational efficiency even if its throughput is different from that of an exposure apparatus.
    Type: Grant
    Filed: January 20, 1998
    Date of Patent: October 5, 1999
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Masami Ohtani, Minobu Matsunaga, Tutomu Ueyama, Ryuji Kitakado, Kaoru Aoki, Masao Tsuji
  • Patent number: 5901679
    Abstract: In an engine for a vehicle including a bearing cap integral type oil pan which has a plurality of bearing cap sections integrally provided thereon and which is integrally coupled to a cylinder block, connecting bolts are screwed into the bearing cap sections from the cylinder block to integrally couple the cylinder block and the oil pan to each other. An oil pan chamber, which is an as-cast bore made by drawing a die in an axial direction of a crankshaft, is defined to extend continuously in the axial direction of the crankshaft between the bearing cap sections and a bottom wall of the oil pan. Thus, the oil pan can be produced simply, at a low cost, by a casting process and moreover, it is possible to reduce the weight and size of the oil pan and increase the rigidity of the oil pan.
    Type: Grant
    Filed: October 16, 1997
    Date of Patent: May 11, 1999
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Shigekazu Tanaka, Takashi Taguchi, Shigemasa Kajiwara, Masashi Murata, Atsushi Iwamoto, Toshinari Sonoda, Masahiko Tashiro, Yasuyuki Kimura, Kaoru Aoki, Mitsuo Takashima
  • Patent number: 5799014
    Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.
    Type: Grant
    Filed: September 16, 1994
    Date of Patent: August 25, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Kozaki, Junichirou Yanagi, Kiyoshi Aiki, Yutaka Ito, Kaoru Aoki, Shinobu Gohara
  • Patent number: 5740158
    Abstract: An ATM communication system including a plurality of communication nodes connected in a loop form by buses, buffers disposed in each communication node, a synchronizing pulse generation circuit for conducting cell demultiplexing of all communication nodes at the same timing, storage devices disposed in each communication node to store mounting position information of the communication node and slot generator position information, and a circuit used by each communication node to automatically transmit and receive cells on the basis of position information described above.
    Type: Grant
    Filed: October 10, 1996
    Date of Patent: April 14, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Kaoru Aoki, Masataka Takano, Junichirou Yanagi, Tetsushi Nakano, Miho Iino
  • Patent number: 5710770
    Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: January 20, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Kozaki, Junichirou Yanagi, Kiyoshi Aiki, Yutaka Ito, Kaoru Aoki, Shinobu Gohara
  • Patent number: 5639301
    Abstract: An apparatus including a structure which separates a first transport robot (high temperature robot), which accesses a first processing part group including the thermal processing parts, from a second transport robot (low temperature robot) which accesses the only non-thermal processing parts. During circulating transportation of substrates to be processed, heat created at thermal processing parts is prevented from flowing into non-thermal processing parts. Semiconductor wafers are circulated one by one between the first processing part group which includes a hot plate and a second processing part group which does not include a hot plate and processed one at a time at each processing part. The high temperature robot accesses the first processing part group while the low temperature robot accesses the second processing part group. Transfer of a semiconductor wafer between the two robots is performed at a transfer part which is formed using a cool plate.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: June 17, 1997
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Shigeru Sasada, Kaoru Aoki, Mitsumasa Kodama, Kenji Sugimoto, Yoshiteru Fukutomi, Hidekazu Inoue
  • Patent number: 5604729
    Abstract: An ATM communication system including a plurality of communication nodes connected in a loop form by buses, buffers disposed in each communication node, a synchronizing pulse generation circuit for conducting cell demultiplexing of all communication nodes at the same timing, storage devices disposed in each communication node to store mounting position information of the communication node and slot generator position information, and a circuit used by each communication node to automatically transmit and receive cells on the basis of position information described above.
    Type: Grant
    Filed: September 29, 1994
    Date of Patent: February 18, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Kaoru Aoki, Masataka Takano, Junichirou Yanagi, Tetsushi Nakano, Miho Iino
  • Patent number: 5365519
    Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.
    Type: Grant
    Filed: March 4, 1992
    Date of Patent: November 15, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Kozaki, Junichirou Yanagi, Kiyoshi Aiki, Yutaka Ito, Kaoru Aoki
  • Patent number: 5150511
    Abstract: A method for manufacturing a magnetic transducer head in which a track width regulating grooves provided on both edges of a magnetic gap are filled by blowing a powder beam of nonmagnetic material having a very fine particle size to deposit the nonmagnetic material in the grooves. A pair of magnetic core members are bonded together to form a magnetic gap therebetween by providing a metal layer of a bonding surface of the core members and applying a pressure to the core members under an elevated temperature to cause a mutual diffusion of the metal to bond the core members together. Thus the magnetic transducer head can be made without using a high-temperature heat treatment.
    Type: Grant
    Filed: May 31, 1991
    Date of Patent: September 29, 1992
    Assignee: Sony Corporation
    Inventors: Katsumi Sakata, Tatsuo Kumura, Atsushi Suzuki, Yoshito Ikeda, Kaoru Aoki, Naoto Kojima, Akio Mishima
  • Patent number: 4768493
    Abstract: An arrangement for heating the blow-by gas system of a water cooled type internal combustion engine by providing engine coolant conduits in heat exchange relationship with the blow-by gas hoses and PCV valve. In one embodiment a water jacket surrounds the PCV valve. The heat exchangers between the blow-by gas system hoses and the coolant hoses are parallel adjacent conduits in one embodiment and concentric conduits in another embodiment.
    Type: Grant
    Filed: April 29, 1985
    Date of Patent: September 6, 1988
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Shoichi Ohtaka, Yukio Kondo, Kaoru Aoki, Masayuki Kumada, Takashi Iwashita
  • Patent number: 4741295
    Abstract: An intake manifold system for a V-type multiple cylinder engine comprising an upstream intake passage, a plenum intake chamber, an intake manifold and downstream intake passages. The upstream intake passage which is directly connected to a throttle body curves downwards towards the intake chamber while the downstream intake passages are connected to the upper end of the intake chamber by way of the intake manifold and after being curved in the shape of inverted letter U are connected to the intake ports of the engine. The intake manifold system as a whole can be accommodated within a gap defined between the two cylinder banks of the engine in a highly compact manner. The advantageous arrangement of the overall intake passage produces favorable ram effect and assures high volume efficiency particularly in low speed range of the engine.
    Type: Grant
    Filed: September 5, 1986
    Date of Patent: May 3, 1988
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Hideaki Hosoya, Shigeru Suzuki, Akihisa Senga, Shoichi Ohtaka, Yukio Kondo, Kaoru Aoki, Tadashi Hashimoto, Yasuo Kitami
  • Patent number: RE36751
    Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.
    Type: Grant
    Filed: April 26, 1995
    Date of Patent: June 27, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Kozaki, Junichirou Yanagi, Kiyoshi Aiki, Yutaka Ito, Kaoru Aoki, Shinobu Gohara