Patents by Inventor Kaoru Koyanagi
Kaoru Koyanagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9018795Abstract: The objective of this invention is to provide an autonomous distributed electric power system without depending on a known electric power system. In order to achieve such objective, this invention proposes a following feature: Output frequencies of autonomous grid-connection inverters (104, 164) are to be variably controlled by the control system depending on a change of a stored electric power amount [kWh] of the direct current electric power storage device (102) within an alternating-current autonomous-distributed electric power system; and, such electric power system is built of plural electric power supplier and demander (11, 12, 13, 14, 15) who have electric power storage devices with a system which can control such inverters (104, 164); those inverters are voltage self-exciting as well.Type: GrantFiled: March 12, 2009Date of Patent: April 28, 2015Assignee: VPEC, Inc.Inventors: Kaoru Koyanagi, Satoshi Nagata
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Publication number: 20110175443Abstract: The objective of this invention is to provide an autonomous distributed electric power system without depending on a known electric power system. In order to achieve such objective, this invention proposes a following feature: Output frequencies of autonomous grid-connection inverters (104, 164) are to be variably controlled by the control system depending on a change of a stored electric power amount [kWh] of the direct current electric power storage device (102) within an alternating-current autonomous-distributed electric power system; and, such electric power system is built of plural electric power supplier and demander (11, 12, 13, 14, 15) who have electric power storage devices with a system which can control such inverters (104, 164); those inverters are voltage self-exciting as well.Type: ApplicationFiled: March 12, 2009Publication date: July 21, 2011Applicant: VPEC, INC.Inventors: Kaoru Koyanagi, Satoshi Nagata
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Patent number: 7761402Abstract: This invention relates to a method of determining stability of unstable equilibrium point (UEP) computed by using BCU method, comprising selecting UEP computed by using BCU method, obtaining a test vector Xtest for the selected UEP, say XUEP using the following equation: Xtest=Xspost+0.99(XUEP?Xspost) where Xspost is the SEP, and checking boundary condition of XUEP by simulating system trajectory of post-fault original system starting from Xtest.Type: GrantFiled: February 1, 2008Date of Patent: July 20, 2010Assignees: The Tokyo Electric Power Company, Incorporated, Bigwood Systems, IncorporatedInventors: Hsiao-Dong Chiang, Hua Li, Yasuyuki Tada, Tsuyoshi Takazawa, Takeshi Yamada, Atsushi Kurita, Kaoru Koyanagi
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Patent number: 7483826Abstract: This invention relates to a method of determining stability of unstable equilibrium point (UEP) computed by using BCU method, comprising selecting UEP computed by using BCU method, obtaining a test vector Xtest for the selected UEP, say XUEP using the following equation: Xtest=Xspost+0.99(XUEP?Xspost) where Xspost is the SEP, and checking boundary condition of XUEP by simulating system trajectory of post-fault original system starting from Xtest.Type: GrantFiled: February 9, 2005Date of Patent: January 27, 2009Assignees: The Tokyo Electric Power Company, Incorporated, Bigwood Systems, IncorporatedInventors: Hsiao-Dong Chiang, Hua Li, Yasuyuki Tada, Tsuyoshi Takazawa, Takeshi Yamada, Atsushi Kurita, Kaoru Koyanagi
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Publication number: 20080126060Abstract: This invention relates to a method of determining stability of unstable equilibrium point (UEP) computed by using BCU method, comprising selecting UEP computed by using BCU method, obtaining a test vector Xtest for the selected UEP, say XUEP using the following equation: Xtest=Xspost+0.99(XUEP?Xspost) where Xspost is the SEP, and checking boundary condition of XUEP by simulating system trajectory of post-fault original system starting from Xtest.Type: ApplicationFiled: February 1, 2008Publication date: May 29, 2008Applicant: The Tokyo Electric Power Co. Inc.Inventors: Hsiao-Dong CHIANG, Hua Li, Yasuyuki Tada, Tsuyoshi Takazawa, Takeshi Yamada, Atsushi Kurita, Kaoru Koyanagi
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Publication number: 20060190227Abstract: This invention relates to a method of determining stability of unstable equilibrium point (UEP) computed by using BCU method, comprising selecting UEP computed by using BCU method, obtaining a test vector Xtest for the selected UEP, say XUEP using the following equation: Xtest=Xspost+0.99(XUEP?Xspost) where Xspost is the SEP, and checking boundary condition of XUEP by simulating system trajectory of post-fault original system starting from Xtest.Type: ApplicationFiled: February 9, 2005Publication date: August 24, 2006Applicants: The Tokyo Electric Power Co. Inc., Bigwood Systems, IncorporatedInventors: Hsiao-Dong Chiang, Hua Li, Yasuyuki Tada, Tsuyoshi Takazawa, Takeshi Yamada, Atsushi Kurita, Kaoru Koyanagi
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Patent number: 6868311Abstract: A system for on-line dynamic screening of contingencies comprising postulated disturbances which an electric power system may experience, the system comprising a dynamic contingency screening program for evaluating a plurality of contingencies with a plurality of contingency classifiers based on the method of finding the controlling unstable equilibrium point of the power system known as the boundary of stability region based controlling unstable equilibrium point method by sequentially applying the contingencies to a network islanding problem classifier, S.E.Type: GrantFiled: April 22, 2003Date of Patent: March 15, 2005Assignees: The Tokyo Electric Power Company, IncorporatedInventors: Hsiao-Dong Chiang, Atsushi Kurita, Hiroshi Okamoto, Ryuya Tanabe, Yasuyuki Tada, Kaoru Koyanagi, Yicheng Zhou
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Publication number: 20030200010Abstract: A system for on-line dynamic screening of contingencies comprising postulated disturbances which an electric power system may experience, the system comprising a dynamic contingency screening program for evaluating a plurality of contingencies with a plurality of contingency classifiers based on the method of finding the controlling unstable equilibrium point of the power system known as the boundary of stability region based controlling unstable equilibrium point method by sequentially applying the contingencies to a network islanding problem classifier, S.E.Type: ApplicationFiled: April 22, 2003Publication date: October 23, 2003Inventors: Hsiao-Dong Chiang, Atsushi Kurita, Hiroshi Okamoto, Ryuya Tanabe, Yasuyuki Tada, Kaoru Koyanagi, Yicheng Zhou
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Patent number: 5353140Abstract: A liquid crystal display of the chiral smectic type is caused to have grey scales, by applying a voltage of an intermediate level to the liquid crystal. Within each picture element of the display, there are a number of domains of the liquid crystal layer, some being transparent while the other being opaque rendering grey tone to the picture element.Type: GrantFiled: November 30, 1992Date of Patent: October 4, 1994Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Takashi Inujima, Toshimitsu Konuma, Toshiji Hamatani, Akira Mase, Mitsunori Sakama, Minoru Miyazaki, Kaoru Koyanagi, Toshiharu Yamaguchi
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Patent number: 5296405Abstract: An improved semiconductor processing is disclosed. In the manufacturing process, a semiconductor layer is formed and then undergoes photo annealing. A neutralizer is then introduced to the photoannealed semiconductor. The semiconductor thus formed demonstrates the SEL effect instead of the Staebler-Wronski effect.Type: GrantFiled: August 24, 1992Date of Patent: March 22, 1994Assignee: Semiconductor Energy Laboratory Co.., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Susumu Nagayama, Takashi Inujima, Masayoshi Abe, Takeshi Fukada, Mikio Kinka, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Kaoru Koyanagi
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Patent number: 5196954Abstract: A liquid crystal display of the chiral smectic type is caused to have grey scales, by applying a voltage of an intermediate level to the liquid crystal. Within each picture element of the display, there are a number of domains of the liquid crystal layer, some being transparent while the other being opaque rendering grey tone to the picture element.Type: GrantFiled: September 12, 1988Date of Patent: March 23, 1993Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Takashi Inujima, Toshimitsu Konuma, Toshiji Hamatani, Akira Mase, Mitsunori Sakama, Minoru Miyazaki, Kaoru Koyanagi, Toshiharu Yamaguchi
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Patent number: 5171710Abstract: An improved semiconductor processing is disclosed. In the manufacturing process, a semiconductor layer is formed and then undergoes photo annealing. A neutralizer is then introduced to the photoannealed semiconductor. The semiconductor thus formed demonstrates the SEL effect instead of the Staebler-Wronski effect.Type: GrantFiled: May 9, 1990Date of Patent: December 15, 1992Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Susumu Nagayama, Takashi Inujima, Masayoshi Abe, Takeshi Fukada, Mikio Kinka, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Kaoru Koyanagi
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Patent number: 5089426Abstract: An improved semiconductor device is disclosed which is free from current leakage due to pin-holes or other gaps. Also an improved method for provessing a semiconductor device is shown. According to the invention, gaps produced in fabricating process of the semiconductor layer are filled with insulator in advance of deposition of electrodes. By virtue of this configuration, short current paths do not result even if transparent electrode is provided on the semiconductor layer.Type: GrantFiled: January 16, 1990Date of Patent: February 18, 1992Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Masato Susukida, Mikio Kinka, Takeshi Fukada, Masayoshi Abe, Ippei Kobayashi, Katsuhiko Shibata, Kaoru Koyanagi, Susumu Nagayama
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Patent number: 4986213Abstract: An improved semiconductor processing is desclosed. In the manufacturing process, just formed semiconductor layer undergoes photo annealing and latent dangling bonds are let appear on the surface and gaps, then neutralizer is introduced to the ambience of the semiconductor. The semiconductor thus formed demonstrates SEL effect in place of Staebler-Wronski effect.Type: GrantFiled: September 28, 1988Date of Patent: January 22, 1991Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Susumu Nagayama, Takashi Inujima, Masayoshi Abe, Takeshi Fukada, Mikio Kinka, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Kaoru Koyanagi
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Patent number: 4937651Abstract: An improved semiconductor device is disclosed which is free from current leakage due to pin-holes or other gaps. Also an improved method for processing a semiconductor device is shown. According to the invention, gaps produced in fabricating process of the semiconductor layer are filled with insulator in advance of deposition of electrodes.Type: GrantFiled: August 22, 1986Date of Patent: June 26, 1990Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Mikio Kinka, Takeshi Fukada, Masayoshi Abe, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Susumu Nagayama, Kaoru Koyanagi
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Patent number: 4888305Abstract: An improved semiconductor processing is disclosed. In the manufacturing process, just formed semiconductor layer undergoes photo annealing and latent dangling bonds are let appear on the surface and gaps, then neutralizer is introduced to the ambience of the semiconductor. The semiconductor thus formed demonstrates SEL effect in place of Staebler-Wronski effect.Type: GrantFiled: March 9, 1989Date of Patent: December 19, 1989Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Susumu Nagayama, Takashi Inujima, Masayoshi Abe, Takeshi Fukada, Mikio Kinka, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Kaoru Koyanagi
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Patent number: 4861143Abstract: A liquid crystal display of the chiral smectic type is caused to have grey scales, by applying a voltage of an intermediate level to the liquid crystal. Within each picture element of the display, there are a number of domains of the liquid crystal layer, some being transparent while the other being opaque rendering grey tone to the picture element.Type: GrantFiled: December 2, 1987Date of Patent: August 29, 1989Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Takashi Inujima, Toshimitsu Konuma, Toshiji Hamatani, Akira Mase, Mitsunori Sakama, Minoru Miyazaki, Kaoru Koyanagi, Toshiharu Yamaguchi
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Patent number: 4812415Abstract: An improved semiconductor device is disclosed which is free from current leakage due to pin-holes or other gaps. Also an improved method for processing a semiconductor device is shown. According to the invention, gaps produced during the fabricating process of the semiconductor layer are filled with insulator in advance of deposition of electrodes. By virtue of this configuration, short current paths do not result when electrodes are provided on the semiconductor layer.Type: GrantFiled: August 6, 1987Date of Patent: March 14, 1989Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kunio Suzuki, Mikio Kinka, Takeshi Fukada, Masayoshi Abe, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Susumu Nagayama, Kaoru Koyanagi
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Patent number: 4799776Abstract: The liquid crystal display according to this invention comprises a liquid crystal cell having a pair of substrates with faced insides which are provided with electrodes, ferroelectric liquid crystal with a chiral smectic C phase in between said substrates and a polarizing plate on the light incidence side. One of said electrodes is a relfective electrode. The display is utilized with microcomputers, word processors, television or so on, and wherein, due to a small number of parts, the absorption loss of light is small and a reflective plate is prevented from being oxided and therefore degraded in reflection index, since it is not exposed to air.Type: GrantFiled: March 2, 1987Date of Patent: January 24, 1989Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Takashi Inujima, Akira Mase, Toshimitsu Konuma, Mitsunori Sakama, Toshiji Hamatani, Minoru Miyazaki, Kaoru Koyanagi, Toshiharu Yamaguchi
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Patent number: 4786607Abstract: An improved semiconductor device is disclosed which is free from current leakage due to pin-holes or other gaps. Also an improved method for processsing a semiconductor device is shown. According to the invention, gaps produced in fabricating process of the semiconductor layer are filled with insulator in advance of deposition of electrodes.Type: GrantFiled: September 4, 1987Date of Patent: November 22, 1988Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shumpei Yamazaki, Kunio Suzuki, Mikio Kinka, Takeshi Fukada, Masayoshi Abe, Ippei Kobayashi, Katsuhiko Shibata, Masato Susukida, Susumu Nagayama, Kaoru Koyanagi