Patents by Inventor Kaoru Sonobe

Kaoru Sonobe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160254780
    Abstract: A power conversion apparatus that is connected between a solar panel and a power system, in which the power conversion apparatus includes a power generating mode that converts a generated power of the solar panel into an alternating current power, and a snow melting mode that heats the solar panel by obtaining the power from the power system, and supplying the power to the solar panel, and at the time of the snow melting mode, the power conversion apparatus controls a voltage which is output to the solar panel such that a first current value being a value where a current that is supplied to the solar panel from the power conversion apparatus is smaller than an overcurrent level of the solar panel flows in a predetermined period.
    Type: Application
    Filed: February 19, 2016
    Publication date: September 1, 2016
    Inventors: Tomomichi ITO, Hideaki KUNISADA, Kaoru SONOBE, Hirotaka NISHIZAWA, Yoshiro NAKAJIMA, Tamaki WADA
  • Patent number: 8461690
    Abstract: A semiconductor device includes a chip stacked body where a plurality of semiconductor chips are stacked, and penetration electrodes respectively formed in the semiconductor chips are electrically interconnected in stacking order of the semiconductor chips, a first support member that is disposed to face a first semiconductor chip formed in one end of the chip stacked body, and including electrodes electrically connected to the penetration electrodes of the first semiconductor chip, and a wiring board that is disposed to face a second semiconductor chip formed in an end opposed to the one end of the chip stacked body, and including external electrodes on a surface opposed to a surface facing the second semiconductor chip that is to be electrically connected to the penetration electrodes of the second semiconductor chip.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: June 11, 2013
    Assignee: Elpida Memory, Inc.
    Inventors: Masanori Yoshida, Daisuke Tsuji, Masahito Yamato, Jun Sasaki, Kaoru Sonobe, Akira Ide, Masahiro Yamaguchi
  • Patent number: 8253258
    Abstract: The present invention provides a semiconductor device which includes a semiconductor chip formed with an electrode pad on one surface thereof, a wiring board having a wiring pattern, with its one surface opposing the other surface of the semiconductor chip, a wire for electrically connecting the electrode pad of the semiconductor chip with the wiring pattern of the wiring board, an external terminal arranged on the other surface of the wiring board for electrical connection with the electrode pad through the wire and wiring pattern, and a sealant for fixing the semiconductor chip on one surface of the wiring board such that a hollow is formed between the other surface of the semiconductor chip and the one surface of the wiring board. The wiring board includes a throughhole communicating with the hollow.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: August 28, 2012
    Assignee: Elpida Memory, Inc.
    Inventors: Kaoru Sonobe, Hidehiro Takeshima, Shinei Sato
  • Publication number: 20110147945
    Abstract: A semiconductor device includes a chip stacked body where a plurality of semiconductor chips are stacked, and penetration electrodes respectively formed in the semiconductor chips are electrically interconnected in stacking order of the semiconductor chips, a first support member that is disposed to face a first semiconductor chip formed in one end of the chip stacked body, and including electrodes electrically connected to the penetration electrodes of the first semiconductor chip, and a wiring board that is disposed to face a second semiconductor chip formed in an end opposed to the one end of the chip stacked body, and including external electrodes on a surface opposed to a surface facing the second semiconductor chip that is to be electrically connected to the penetration electrodes of the second semiconductor chip.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 23, 2011
    Inventors: Masanori YOSHIDA, Daisuke Tsuji, Masahito Yamato, Jun Sasaki, Kaoru Sonobe, Akira Ide, Masahiro Yamaguchi
  • Publication number: 20100244234
    Abstract: The present invention provides a semiconductor device which includes a semiconductor chip formed with an electrode pad on one surface thereof, a wiring board having a wiring pattern, with its one surface opposing the other surface of the semiconductor chip, a wire for electrically connecting the electrode pad of the semiconductor chip with the wiring pattern of the wiring board, an external terminal arranged on the other surface of the wiring board for electrical connection with the electrode pad through the wire and wiring pattern, and a sealant for fixing the semiconductor chip on one surface of the wiring board such that a hollow is formed between the other surface of the semiconductor chip and the one surface of the wiring board. The wiring board includes a throughhole communicating with the hollow.
    Type: Application
    Filed: March 4, 2010
    Publication date: September 30, 2010
    Inventors: Kaoru SONOBE, Hidehiro Takeshima, Shinei Sato
  • Patent number: 5393705
    Abstract: A molded semiconductor device comprises a semiconductor chip mounted on an island portion, and external leads coupled with ball pumps on the semiconductor chip by means of a conductive leads patterned on a film carrier, and the conductive leads are formed from a conductive lattice pattern on the film carrier available for other molded devices by selectively cutting the conductive lattice pattern with, for example, a laser beam generator, thereby reducing the production cost.
    Type: Grant
    Filed: February 22, 1994
    Date of Patent: February 28, 1995
    Assignee: NEC Corporation
    Inventor: Kaoru Sonobe
  • Patent number: 5193053
    Abstract: A plastic semiconductor device has a lead frame provided with an island for received a semiconductor element. A plurality of leads project from a square outer frame and are distributed around the periphery of the island. An insulating substrate covers and is bonded to one principal surface of the island while exposing the semiconductor element. Distributing wires are formed on one principal surface of the insulating substrate to conform with the leads. A conductive substance connects the distributing wires to the leads and fills any through-holes formed in the insulating substrate. Bonding wires connect input-output terminals of the semiconductor element to the leads. A resin body encloses and embeds the bonding wires and the semiconductor element. A heat sink may be bonded to the back face of the island.
    Type: Grant
    Filed: October 23, 1991
    Date of Patent: March 9, 1993
    Assignee: NEC Corporation
    Inventor: Kaoru Sonobe