Abstract: A circuit comprising a first capacitor configured to be charged to a voltage representing state information of a compensator, a second capacitor, a buffer circuit configured to charge the second capacitor to a voltage substantially equal to that of the first capacitor and a switching network configured to transition between a first state and a second state. When the switching network is in the first state, the second capacitor is charged to the voltage across the first capacitor. When the switching network is in the second state, the buffer circuit is disconnected from the second capacitor and the first capacitor and the second capacitor are connected in parallel.

Abstract: A circuit configured to receive a first and second voltages and generate an output voltage, the circuit comprising: a first capacitor configured to charge to a voltage equal a difference between the first voltage and the output voltage; a second capacitor configured to charge to a voltage equal to a difference between the first voltage and the second voltage; and a plurality of conductive paths coupled to the first and second capacitors. In a first state, the conductive paths are configured to cause the second capacitor to charge to the voltage equal to the difference between the first voltage and the second voltage. In a second state, the conductive paths are configured to cause the second capacitor to be connected in parallel with the first capacitor to cause the first capacitor to charge to the voltage equal to the difference between the first voltage and the output voltage.

Abstract: A control circuit for a voltage regulator includes a divider coupled to the regulated output voltage to generate a divided voltage having a value that is a fraction of the regulated output voltage, an ADC responsive to the divided voltage to generate a feedback control signal, a digital compensator responsive to the feedback control signal and to a feedforward control signal scaled by a feedforward gain value to generate a compensator signal, and a pulse width modulator responsive to the compensator signal to generate a voltage control signal to control a switch of the voltage regulator. The digital compensator includes a register configured to store a value indicative of the input voltage and a feedforward gain unit configured to generate the feedforward gain value in response to the value indicative of the input voltage. In embodiments, the feedforward gain value is generated in response to the square of the value indicative of the input voltage.

Abstract: A control circuit for a voltage regulator includes a divider coupled to the regulated output voltage to generate a divided voltage having a value that is a fraction of the regulated output voltage, an ADC responsive to the divided voltage to generate a feedback control signal, a digital compensator responsive to the feedback control signal and to a feedforward control signal scaled by a feedforward gain value to generate a compensator signal, and a pulse width modulator responsive to the compensator signal to generate a voltage control signal to control a switch of the voltage regulator. The digital compensator includes a register configured to store a value indicative of the input voltage and a feedforward gain unit configured to generate the feedforward gain value in response to the value indicative of the input voltage. In embodiments, the feedforward gain value is generated in response to the square of the value indicative of the input voltage.

Abstract: A control circuit for generating a feedforward control signal based on an input voltage includes a divider coupled to the input voltage to generate a divided voltage and a first buffer responsive to the divided voltage to generate a buffered voltage at an output of the first buffer. The control circuit also includes a first capacitor coupled to the first buffer output and configured to generate a feedforward current when there is a variation in the input voltage and a current mirror circuit including a current mirror output node at which a current mirror output voltage indicative of the input voltage variation is generated. A digitizing circuit is responsive to the current mirror output voltage to generate the feedforward control signal. A DC-DC converter and a method for generating a feedforward control signal based on an input voltage are also provided.

Abstract: A tunable fractional phase locked loop (PLL) (hereinafter “tunable PLL”) is described herein and includes a controller configured to tune the tunable PLL to a range of frequencies corresponding to a frequency of the input clock signal. The tunable PLL includes a phase detector configured to receive an input clock signal and a feedback signal, a voltage controller oscillator (VCO) configured to receive the error signal from said phase detector and in response thereto to generate a VCO clock signal, a controller configured to generate a dithered division ratio having an average value corresponding to a ratio of a number of edges of the VCO clock signal generated in a cycle of the input clock signal, and a feedback module configured to generates a feedback signal to tune the PLL such that the PLL operates in the range of input frequencies of the input clock signal.

Abstract: A control circuit for a voltage regulator includes a digital compensator having adaptive compensation to permit operation over different operating conditions. The digital compensator includes a gain parameter that is inversely proportional to the input voltage and is independent of the switching frequency. In embodiments, the voltage regulator has a crossover frequency established by at least one pole and at least one zero and the corner frequency of the converter output filter has a first fixed, predetermined relationship with respect to the switching frequency, a second fixed, predetermined relationship with respect to the crossover frequency, and a third fixed, predetermined relationship with respect to the at least one pole and at least one zero.

Abstract: A control circuit for a voltage regulator includes a digital compensator having adaptive compensation to permit operation over different operating conditions. The digital compensator includes a gain parameter that is inversely proportional to the input voltage and is independent of the switching frequency. In embodiments, the voltage regulator has a crossover frequency established by at least one pole and at least one zero and the corner frequency of the converter output filter has a first fixed, predetermined relationship with respect to the switching frequency, a second fixed, predetermined relationship with respect to the crossover frequency, and a third fixed, predetermined relationship with respect to the at least one pole and at least one zero.

Abstract: A control circuit for generating a feedforward control signal based on an input voltage includes a divider coupled to the input voltage to generate a divided voltage and a first buffer responsive to the divided voltage to generate a buffered voltage at an output of the first buffer. The control circuit also includes a first capacitor coupled to the first buffer output and configured to generate a feedforward current when there is a variation in the input voltage and a current mirror circuit including a current mirror output node at which a current mirror output voltage indicative of the input voltage variation is generated. A digitizing circuit is responsive to the current mirror output voltage to generate the feedforward control signal. A DC-DC converter and a method for generating a feedforward control signal based on an input voltage are also provided.

Abstract: A control circuit includes an oscillator responsive to a control voltage to generate a clock signal having an associated frequency. A counter is responsive to the clock signal to generate a count signal and a comparator is responsive to the count signal and to a threshold signal to generate a comparison signal. The control circuit farther includes a delay line comprising a plurality of series coupled delay elements, each responsive to the comparison signal and to the control voltage to generate a phase shifted signal at a respective delay line output. A latch is responsive to a selected phase shifted signal to generate a control signal having edges occurring in response to edges of a signal used to set the latch and in response to the selected phase shifted signal to reset the latch. A method for generating a control signal in a control circuit is also provided.

Abstract: A system for reducing power loss in a switched-capacitor converter includes a first and second switched capacitor sub-converter each having a flying capacitor and a first, second, third, and fourth switching device. Each switching device is controlled by one of a first, second, third, and fourth clock signal. The first, second, third and fourth clock signals of the second switched capacitor sub-converter are inverted such that the first switched capacitor sub-converter operates during a first phase and the second switched capacitor converter operates during a second phase that is 1800 degrees out of phase from the first phase. The system also includes a resonant charge sharing portion for coupling a bottom-plate parasitic capacitance of the first switched capacitor sub-converter to a bottom-plate parasitic capacitance of the second switched capacitor converter.

Abstract: A two-phase interleaved DC-DC converter includes a first and second switched capacitor sub-converter each including a plurality of switching devices and a flying portion coupling to a switching node. The switching node of each of the first and second switched capacitor sub-converters are coupled together to form a common node and an inductor is coupled between the common node and the output node. The two-phase interleaved DC-DC converter may operate at a non-resonant, quasi-resonant or resonant mode of operation.

Abstract: A system and method allows for controlling a resonant switched-mode converter to provide a variable conversion ratio. The system and method operates to control the switching devices such that the impedance of the switched-mode converter is set to a plurality of configurations for a plurality of time intervals. The system and method may further include off-time modulation techniques for varying or maintaining the overall switching period of the switched-mode converter.

Abstract: A system for reducing power loss in a switched-capacitor converter includes a first and second switched capacitor sub-converter each having a flying capacitor and a first, second, third, and fourth switching device. Each switching device is controlled by one of a first, second, third, and fourth clock signal. The first, second, third and fourth clock signals of the second switched capacitor sub-converter are inverted such that the first switched capacitor sub-converter operates during a first phase and the second switched capacitor converter operates during a second phase that is 1800 degrees out of phase from the first phase. The system also includes a resonant charge sharing portion for coupling a bottom-plate parasitic capacitance of the first switched capacitor sub-converter to a bottom-plate parasitic capacitance of the second switched capacitor converter.

Abstract: A system and method allows for controlling a resonant switched-mode converter to provide a variable conversion ratio. The system and method operates to control the switching devices such that the impedance of the switched-mode converter is set to a plurality of configurations for a plurality of time intervals. The system and method may further include off-time modulation techniques for varying or maintaining the overall switching period of the switched-mode converter.